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參數資料
| 型號： | romr0002 |
| 廠商： | SIEMENS AG |
| 英文描述： | MultiMediaCard R0002 2 Mbyte ROM(多媒體卡 R0002 2 Mbyte ROM) |
| 中文描述： | 多媒體R0002 2字節的光盤（多媒體卡R0002 2字節光盤） |
| 文件頁數： | 25/41頁 |
| 文件大小： | 207K |
| 代理商： | ROMR0002 |
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Siemens
Product Manual R0002
Semiconductor Group
25
3.1
The host command and the card response are clocked out with the rising edge of the host clock.The
delay between host command and card response is N
CR
clock cycles.
The following timing diagram is relevant for host command CMD3:
Figure 6: Command response timing (identification mode)
There is a two Z bit period followed by P bits pushed up by the responding card. The following tim-
ing diagram is relevant for all host commands followed by a response, except CMD1, CMD2 and
CMD3:
Figure 7: Command response timing (data transfer mode)
The card identification (CMD2) and card operation conditions (CMD1) timing are processed in the
open-drain mode. The card response to the host command starts after exactly N
ID
clock cycles.
Card identification and card operation conditions timing
Figure 8: Identification timing (card identification mode)
After receiving the last card response, the host can start the next command transmission after at
Last card response - next host command timing
1
see "Chapter 10.2: Electrical characteristics" for more details about the access time
N
RC
N
CC
≥
8
≥
8
Number of cycles between
two commands, if no
response will be sent after
the first command (e.g.
broadcast)
<---- Host command ----> <-N
CR
cycles-> <-------- Response --------->
S T
content
CRC E Z * * * * * * Z S T
CMD
content
CRC E Z Z Z
<---- Host command ----> <-N
CR
cycles -><-------- Response --------->
S T
content
CRC E Z Z P * * * P S T
CMD
content
CRC E Z Z Z
<------Host command ----> <-N
ID
cycles ->
S T
content
CRC E Z * * * * * * Z S T
<---- CID or OCR --->
content
CMD
Z Z Z
Value [clock cycles]
Description
Table 21: Timing values
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