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參數(shù)資料
| 型號： | S2042 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS |
| 中文描述： | 高性能串行接口電路 |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 241K |
| 代理商： | S2042 |
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
1
BiCMOS PECL CLOCK GENERATOR
HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS
S2042/S2043
S2042/S2043
Optical
TX
Optical
RX
Optical
RX
Optical
TX
S2043
RX
S2042
TX
S2036
Open
Fiber
Control
(OFC)
S2036
Open
Fiber
Control
(OFC)
S2042
TX
S2043
RX
Fibre
Channel
Controller
Fibre
Channel
Controller
PRELIMINARY
DEVICE SPECIFICATION
FEATURES
Functionally compliant with ANSI X3T11 Fibre
Channel physical and transmission protocol
standards
S2042 transmitter incorporates phase-locked loop
(PLL) providing clock synthesis from low-speed
reference
S2043 receiver PLL configured for clock and
data recovery
1062, 531 and 266 Mb/s operation
10- or 20-bit parallel TTL compatible interface
1 watt typical power dissipation for chipset
+3.3/+5V power supply
Low-jitter serial PECL compatible interface
Lock detect
Local loopback
10mm x 10mm 52 PQFP package
Fibre Channel framing performed by receiver
Continuous downstream clocking from receiver
TTL compatible outputs possible with +5V I/O
power supply
APPLICATIONS
High-speed data communications
Supercomputer/Mainframe
Workstation
Switched networks
Proprietary extended backplanes
Mass storage devices/RAID drives
GENERAL DESCRIPTION
The S2042 and S2043 transmitter and receiver pair
are designed to perform high-speed serial data trans-
mission over fiber optic or coaxial cable interfaces
conforming to the requirements of the ANSI X3T11
Fibre Channel specification. The chipset is select-
able to 1062, 531 or 266 Mbit/s data rates with
associated 10- or 20-bit data word.
The chipset performs parallel-to-serial and serial-to-
parallel conversion and framing for block-encoded
data. The S2042 on-chip PLL synthesizes the high-
speed clock from a low-speed reference. The S2043
on-chip PLL synchronizes directly to incoming digital
signals to receive the data stream. The transmitter
and receiver each support differential PECL-compat-
ible I/O for fiber optic component interfaces, to
minimize crosstalk and maximize data integrity. Lo-
cal loopback allows for system diagnostics. The TTL
I/O section can operate from either a +3.3V or a +5V
power supply. With a 3.3V power supply the chipset
dissipates only 1W typically.
Figure 1 shows a typical network configuration incor-
porating the chipset. The chipset is compatible with
AMCC’s S2036 Open Fiber Control (OFC) device.
Figure 1. System Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S2043 | HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS |
| S2052 | Fibre Channel and GigaBit Ethernet Transceiver(用于高速串行數(shù)據(jù)傳送的光纖通道和千兆位以太網(wǎng)收發(fā)器) |
| S2053 | Fibre Channel and GigaBit Ethernet Transceiver(用于高速串行數(shù)據(jù)傳送的光纖通道和千兆位以太網(wǎng)收發(fā)器) |
| S2054 | Fibre Channel and GigaBit Ethernet Transceiver(帶雙接收和發(fā)送串行I/O的光纖通道和千兆位以太網(wǎng)收發(fā)器) |
| S2055A | SILICON DIFFUSED POWER TRANSISTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S20420 | 制造商:Microsemi Corporation 功能描述:STD RECOVERY RECTFR 200V 12A 2PIN DO-4 - Bulk 制造商:Microsemi Corporation 功能描述:Diode Switching 200V 12A 2-Pin DO-4 |
| S204201N1124 | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:SILICON POWER RECTIFIER |
| S204201N1124A | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:SILICON POWER RECTIFIER |
| S204201N1125 | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:SILICON POWER RECTIFIER |
| S204201N1125A | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:SILICON POWER RECTIFIER |
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