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參數資料
型號: S29CL016J1JFFM112
廠商: SPANSION LLC
元件分類: PROM
英文描述: 512K X 32 FLASH 3.3V PROM, 54 ns, PBGA80
封裝: 13 X 11 MM, 1 MM PITCH, LEAD FREE, FORTIFIED, BGA-80
文件頁數: 27/78頁
文件大小: 1825K
代理商: S29CL016J1JFFM112
September 27, 2006 S29CD-J_CL-J_00_B1
S29CD-J & S29CL-J Flash Family
31
Pr el im i n a r y
Notes:
1. See Command Definitions on page 71 for erase command sequence.
2. See “DQ3: Sector Erase Timer” for more information.
Figure 8.6 Erase Operation
8.7.4
Erase Suspend / Erase Resume Commands
The Erase Suspend command allows the system to interrupt a sector erase operation and then
read data from, or program data to, any sector not selected for erasure. When the Erase Suspend
command is written during the sector erase time-out, the device immediately terminates the
time-out period and suspends the erase operation. The bank address is required when writing
this command. This command is valid only during the sector erase operation, including the min-
imum 80-s time-out period during the sector erase command sequence. The Erase Suspend
command is ignored if written during the chip erase operation.
When the Erase Suspend command is written after the 80-s time-out period has expired and
during the sector erase operation, the device takes 20 s maximum to suspend the erase
operation.
After the erase operation has been suspended, the bank enters the erase-suspend-read mode.
The system can read data from or program data to any sector that is not selected for erasure.
(The device “erase suspends” all sectors selected for erasure.) Note that when the device is in
the Erase Suspend mode, the Reset command is not required for read operations and is ignored.
Further nesting of erase operation is not permitted. Reading at any address within erase sus-
pended sectors produces status information on DQ7-DQ0. The system can use DQ6 and DQ2
together, to determine if a sector is actively erasing or is erase-suspended. Refer to Table 8.8 on
page 37 for information on these status bits.
A read operation from the erase-suspended bank returns polling data during the first 8 s after
the erase suspend command is issued; read operations thereafter return array data. Read op-
erations from the other bank return array data with no latency.
START
Write Erase
Command Sequence
Data Poll
from System
Data = FFh?
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
相關PDF資料
PDF描述
S29CD032J1JFAN110 1M X 32 FLASH 2.7V PROM, 54 ns, PBGA80
S29CD032J1JFFN020 1M X 32 FLASH 2.7V PROM, 54 ns, PBGA80
S29CL032J0RFAI113 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
S29CL032J0RFAN130 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
S29CL032J0RFFI110 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
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