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參數資料
| 型號： | S29CL032J0RFAI113 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80 |
| 封裝： | 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80 |
| 文件頁數： | 25/78頁 |
| 文件大小： | 1825K |
| 代理商： | S29CL032J0RFAI113 |
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September 27, 2006 S29CD-J_CL-J_00_B1
S29CD-J & S29CL-J Flash Family
29
Pr el im i n a r y
required to provide further controls or timings. The device automatically generates the program
pulses and verifies the programmed cell margin. Command Definitions on page 71 shows the ad-
dress and data requirements for the program command sequence.
Note the following:
When the Embedded Program algorithm is complete, the device
returns to the read mode and address are no longer latched. An
address change is required to begin reading valid array data.
The system can determine the status of the program operation by
using DQ7, DQ6 or RY/BY#. Refer to Write Operation Status on
page 33 for information on these status bits.
A "0" cannot be programmed back to a "1." Attempting to do so
may halt the operation and set DQ5 to 1, or cause the Data# Poll-
ing algorithm to indicate the operation was successful. . A suc-
ceeding read shows that the data is still "0." Only erase operations
can convert a "0" to a "1."
Any commands written to the device during the Embedded Pro-
gram Algorithm are ignored except the Program Suspend com-
mand.
A hardware reset immediately terminates the program operation;
the program command sequence should be re-initiated once the
device has returned to the read mode, to ensure data integrity.
Note: See Table 19.1 and Table 20.2 for program command sequence.
Figure 8.5 Program Operation
START
Write Program
Command Sequence
Data Poll
from System
Verify Data?
No
Yes
Last Address?
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
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