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參數資料
| 型號： | SC2463TSTRT |
| 廠商： | Semtech |
| 文件頁數： | 15/23頁 |
| 文件大小： | 459K |
| 描述： | IC REG QD BCK/LINEAR 28TSSOP |
| 標準包裝： | 1 |
| 拓撲： | 降壓（降壓）同步（2），線性（LDO）（2） |
| 功能： | 任何功能 |
| 輸出數： | 4 |
| 頻率 - 開關： | 600kHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅動器： | 無 |
| 帶監控器： | 無 |
| 帶序列發生器： | 是 |
| 電源電壓： | 4.5 V ~ 30 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 28-TSSOP |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 1358 (CN2011-ZH PDF) |
| 其它名稱： | SC2463TSDKR |
15
?2007 Semtech Corp.
www.semtech.com
SC2463
POWER MANAGEMENT
Applications Information (Cont.)
When two channels with a common input are interleaved,
the total DC input current is simply the sum of the
individual DC input currents. The combined input current
waveform depends on duty ratio and the output current
waveform. Assuming that the output current ripple is
small, the following formula can be used to estimate the
RMS value of the ripple current in the input capacitor.
Let the duty ratio and output current of Channel 1 and
Channel 2 be D
1
, D
2
and I
o1
, I
o2
, respectively.
If D
1
<0.5 and D
2
<0.5, then
.
I
D
I
D
I
2
2
o
2
2
1
o
1
Cin
+
H
If D
1
>0.5 and (D
1
-0.5) < D
2
<0.5, then
.
I
)
5
.
0
D
D
(
)
I
I
)(
5
.
0
D
(
I
5
.
0
I
2
2
o
1
2
2
2
o
1
o
1
2
1
o
Cin
+
+
+
+
H
If D
1
>0.5 and D
2
< (D
1
-0.5) < 0.5, then
.
I
)
5
.
0
D
D
(
)
I
I
(
D
I
5
.
0
I
2
2
o
2
1
2
2
o
1
o
2
2
1
o
Cin
+
+
+
H
If D
1
>0.5 and D
2
> 0.5, then
.
I
)
D
1
(
I
)
D
1
(
)
I
I
)(
1
D
D
(
I
2
2
o
1
2
1
o
2
2
2
o
1
o
2
1
Cin
+
+
+
+
H
Choosing P
Choosing P
Choosing P
Choosing P
Choosing Poo oo oww ww wer MOSFET
er MOSFET
er MOSFET
er MOSFET
er MOSFETss ss s
Main considerations in selecting the MOSFETs are power
dissipation, cost and packaging. Switching losses and
conduction losses of the MOSFETs are directly related to
the total gate charge (C
g
) and channel on-resistance
(R
ds(on)
). In order to judge the performance of MOSFETs,
the product of the total gate charge and on-resistance is
used as a figure of merit (FOM). Transistors with the same
FOM follow the same curve in Figure 5.
The closer the curve is to the origin, the lower is the FOM.
This means lower switching loss or lower conduction loss
or both. It may be difficult to find MOSFETs with both low
C
g
and low R
ds(on
. Usually a trade-off between R
ds(on
and
C
g
has to be made.
0
5
10
15
20
0
20
40
FOM:100*10^{-12}
FOM:200*10^{-12}
FOM:500*10^{-12}
On-resistance (mOhm)
50
1
Cg100 Rds
,
(
)
Cg200 Rds
,
(
)
Cg500 Rds
,
(
)
20
1
Rds
Figure 5. Figure of Merit curves
MOSFET selection also depends on applications. In many
applications, either switching loss or conduction loss
dominates for a particular MOSFET. For synchronous buck
converters with high input to output voltage ratios, the
top MOSFET is hard switched but conducts with very low
duty cycle. The bottom switch conducts at high duty cycle
but switches at near zero voltage. For such applications,
MOSFETs with low C
g
are used for the top switch and
MOSFETs with low R
ds(on)
are used for the bottom switch.
MOSFET power dissipation consists of
a) conduction loss due to the channel resistance R
ds(on)
,
b) switching loss due to the switch rise time t
r
and fall
time t
f
, and
c) the gate loss due to the gate resistance R
G
.
Top Switch:
The RMS value of the top switch current is calculated as
.
)
1
(
D
I
I
12
o
rms
,
1
Q
2
?/DIV>
+
=
The conduction losses are then
P
tc
= I
Q1,rms
2
R
ds(on)
.
R
ds(on)
varies with temperature and gate-source voltage.
Curves showing R
ds(on)
variations can be found in
manufacturers data sheet. From the Si4860
datasheet, R
ds(on)
is less than 8mW when V
gs
is greater
than 10V. However R
ds(on)
increases by 50% as the
junction temperature increases from 25
o
C to 110
o
C.
The switching losses can be estimated using the simple
formula
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