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參數資料
型號: SC402BMLTRT
廠商: Semtech
文件頁數: 22/32頁
文件大小: 1425K
描述: IC REG DL BCK/LINEAR SYNC 32MLPQ
標準包裝: 1
系列: EcoSpeed®, SmartDrive™
拓撲: 降壓(降壓)同步(1),線性(LDO)(1)
功能: 任何功能
輸出數: 2
頻率 - 開關: 1MHz
電壓/電流 - 輸出 1: 可調至 0.6V,10A
電壓/電流 - 輸出 2: 可調至 0.75V,200mA
帶 LED 驅動器:
帶監控器:
帶序列發生器:
電源電壓: 3 V ~ 28 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-MLPQ(5x5)
包裝: 標準包裝
其它名稱: SC402BMLDKR
SC402B
22
Due to the initial current limitations on the LDO during
power up (Figure 10), any external load attached to the
VDD pin must be limited to less than the start up current
before the LDO has reached 90% of its final regulation
value.
 
V
VLDO
 Final
90% of
V
VLDO
 Final
Constant current
startup @ ~ 115mA
Voltage regulating
with ~ 200mA
current limit
Short-circuit Protection @ ~ 65mA
0.7V
Figure 10  LDO Start-Up
LDO Switch-Over Operation
The SC402B includes a switch-over function for the LDO.
The switch-over function is designed to increase efficiency
by using the more efficient DC-DC converter to power the
LDO output, avoiding the less efficient LDO regulator
when possible. The switch-over function connects the
VDD pin directly to the VOUT pin using an internal switch.
When the switch-over is complete the LDO is turned off,
which results in a power savings and maximizes efficiency.
If the LDO output is used to bias the SC402B, then after
switch-over the device is self-powered from the switching
regulator with the LDO turned off.
The switch-over starts 32 switching cycles after PGOOD
output goes high. The voltages at the VDD and VOUT pins
are then compared; if the two voltages are within ?00mV
of each other, the VDD pin connects to the VOUT pin using
an internal switch, and the LDO is turned off. To avoid
unwanted switch-over, the minimum difference between
the voltages for VOUT and VDD should be ?00mV.
It is not recommended to use the switch-over feature for
an output voltage less than VDD UVLO threshold since the
SC402B is not operational below that threshold.
Switch-over MOSFET Parasitic Diodes
The switch-over MOSFET contains parasitic diodes that
are inherent to its construction, as shown in Figure 11. If
the voltage at the VOUT pin is higher than VDD, then the
respective diode will turn on and the current will flow
through this diode. This has the potential of damaging
the device. Therefore, V
OUT
 must be less than VDD to
prevent damaging the device.
Switchover
MOSFET
Parasitic diode
VDD
LDO
V
OUT
Switchover
control
Figure 11 Switch-over MOSFET Parasitic Diodes
Design Procedure
When designing a switch mode supply the input voltage
range, load current, switching frequency, and inductor
ripple current must be specified.
The maximum input voltage (V
INMAX
) is the highest speci-
fed input voltage. The minimum input voltage ( V
INMIN
) is
determined by the lowest input voltage after evaluating
the voltage drops due to connectors, fuses, switches, and
PCB traces.
The following parameters define the design.
Nominal output voltage (V
OUT
)
Static or DC output tolerance
Transient response
Maximum load current (I
OUT
)
"
"
"
"
Applications Information (continued)
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