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參數資料
| 型號： | SN74AUP1G08DBVRE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO5 |
| 封裝： | GREEN, PLASTIC, SOT-23, 5 PIN |
| 文件頁數： | 1/25頁 |
| 文件大小： | 1135K |
| 代理商： | SN74AUP1G08DBVRE4 |
DRY PACKAGE
(TOP VIEW)
B
N.C.
A
6
5
4
2
3
GND
Y
V
CC
1
DBV PACKAGE
(TOP VIEW)
5
1
2
V
CC
Y
4
3
A
B
GND
DCK PACKAGE
(TOP VIEW)
5
1
2
V
CC
Y
4
3
A
B
GND
DRL PACKAGE
(TOP VIEW)
5
1
2
V
CC
Y
4
3
A
B
GND
Y
3
4
B
2
5
A
6
1
N.C.
V
CC
DSF PACKAGE
(TOP VIEW)
YZP PACKAGE
(TOP VIEW)
GND
A
Y
B
3
5
2
1
4
A1
B1
C1
A2
C2
V
CC
YFP PACKAGE
(
VIEW)
TOP
GND
A
Y
V
CC
B
3
6
2
1
4
5
DNU
A1
B1
C1
A2
B2
C2
www.ti.com
SCES502J – NOVEMBER 2003 – REVISED MAY 2010
LOW-POWER SINGLE 2-INPUT POSITIVE-AND GATE
Check for Samples: SN74AUP1G08
1
FEATURES
Available in the Texas Instruments NanoStar
Wide Operating VCC Range of 0.8 V to 3.6 V
Package
Optimized for 3.3-V Operation
Low Static-Power Consumption:
3.6-V I/O Tolerant to Support Mixed-Mode
ICC = 0.9 mA Max
Signal Operation
Low Dynamic-Power Consumption:
tpd = 4.3 ns Max at 3.3 V
Cpd = 4.3 pF Typ at 3.3 V
Suitable for Point-to-Point Applications
Low Input Capacitance: Ci = 1.5 pF Typ
Latch-Up Performance Exceeds 100 mA Per
Low Noise: Overshoot and Undershoot
JESD 78, Class II
<10% of VCC
ESD Performance Tested Per JESD 22
Ioff Supports Partial-Power-Down Mode
–
2000-V Human-Body Model
Operation
(A114-B, Class II)
Schmitt-Trigger Action Allows Slow Input
–
1000-V Charged-Device Model (C101)
Transition and Better Switching Noise
Immunity at the Input (Vhys = 250 mV Typ at
3.3 V)
DNU – Do not use
N.C. – No internal connection
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AUP1G08DBVRG4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DBVT | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DBVTE4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DBVTG4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G08DCKR | 功能描述:邏輯門 LP Single 2-Input Positive-AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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