參數資料
| 型號： | SY89229UMG TR |
| 廠商： | Micrel Inc |
| 文件頁數： | 1/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK DIVIDER /3/5 LVDS 16MLF |
| 標準包裝： | 1,000 |
| 系列： | Precision Edge® |
| 類型： | 時鐘除法器 |
| PLL： | 無 |
| 輸入： | CML，LVDS，PECL |
| 輸出： | LVDS |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 2.625 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，16-MLF? |
| 供應商設備封裝： | 16-MLF?（3x3） |
| 包裝： | 帶卷 (TR) |
SY89229U
1GHz Precision, LVDS
÷3, ÷5 Clock Divider
with Fail Safe Input and Internal Termination
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
August 2007
M9999-080707-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89229U is a precision, low jitter 1GHz
÷3, ÷5
clock divider with an LVDS output. A unique Fail-
Safe Input (FSI) protection prevents metastable
output conditions when the input clock voltage swing
drops significantly below 100mV or input is removed.
The differential input includes Micrel’s unique, 3-pin
internal termination architecture that allows the input
to interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mVPP) without any
level shifting or termination resistor networks in the
signal
path.
The
outputs
are
325mV,
100K-
compatible LVDS with fast rise/fall times guaranteed
to be less than 220ps.
The SY89229U operates from a 2.5V ±5% supply
and
is
guaranteed
over
the
full
industrial
temperature
range
of
–40°C
to
+85°C.
The
SY89229U is part of Micrel’s high-speed, Precision
Edge
product line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Block Diagram
Precision Edge
Features
Accepts a high-speed input and provides a precision
÷3 and ÷5 sub-rate, LVDS output
Fail-Safe Input
–
Prevents oscillations when input is invalid
Guaranteed AC performance over temperature and
supply voltage:
– DC-to >1.0GHz throughput
– <1500ps Propagation Delay (In-to-Q)
– <220ps Rise/Fall times
Ultra-low jitter design:
– <1psRMS random jitter
– <1psRMS cycle-to-cycle jitter
– <10psPP total jitter (clock)
– <0.7psRMS MUX crosstalk induced jitter
Unique patented internal termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
Wide input voltage range VCC to GND
325mV LVDS output
46% to 54% Duty Cycle(÷ 3)
47% to 53% Duty Cycle(÷ 5)
2.5V ±5% supply voltage
-40°C to +85°C industrial temperature range
Available in 16-pin (3mm x 3mm) QFN package
Applications
Fail-safe clock protection
Markets
LAN/WAN
Enterprise servers
ATE
Test and measurement
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY89230U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:1GHz Precision, LVPECL ±3, ±5 Clock Divider with Fail-Safe Input and Internal Termination |
| SY89230U_10 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.2GHz Precision, LVPECL ÷3, ÷5 Clock Divider |
| SY89230U-EVAL | 制造商:Micrel Inc 功能描述:DIVIDE-BY-3 AND 5 LVPECL CLOCK |
| SY89230UMG | 功能描述:時鐘驅動器及分配 Divide-by-3 and 5 LVPECL Clock Divider with Internal Termination and FSI (3.2GHz) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY89230UMG TR | 功能描述:時鐘驅動器及分配 Divide-by-3 and 5 LVPECL Clock Divider with Internal Termination and FSI (3.2GHz) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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