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參數(shù)資料
| 型號(hào)： | TFP401APZPG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, HTQFP-100 |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大小： | 295K |
| 代理商： | TFP401APZPG4 |
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TFP401, TFP401A
TI
PanelBus DIGITAL RECEIVER
SLDS120C - MARCH 2000 REVISED MAY 2011
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TFP401/401A output driver configurations (continued)
Drive Strength (ST = high for high drive strength, ST=low for low drive strength.) The TFP401/401A allows
for selectable output drive strength on the data, control and ODCK outputs. See the dc specifications table for
the values of IOH and IOL current drives for a given ST state. The high output strength offers approximately two
times the drive as the low output drive strength.
Time Staggered Pixel Output. This option works only in conjunction with the 2-pixel/clock mode (PIXS = high).
Setting STAG = low will time stagger the even and odd pixel output so as to reduce the amount of instantaneous
current surge from the power supply. Depending on the PCB layout and design this can help reduce the amount
of system ground bounce and power supply noise. The time stagger is such that in 2-pixel/clock mode the even
pixel is delayed from the latching edge of ODCK by 0.25 Tcip. (Tcip is the period of ODCK. The ODCK period
is 2Tpix when in 2-pixel/clock mode.)
Depending on system constraints of output load, pixel rate, panel input architecture and board cost the
TFP401/401A drive strength and staggered pixel options allow flexibility to reduce system power-supply noise,
ground bounce and EMI.
Power Management. The TFP401/401A offers several system power management features.
The output driver power down (PDO = low) is an intermediate mode which offers several uses. During this mode,
all output drivers except SCDT and CTL1 are driven to a high impedance state while the rest of the device
circuitry remains active
The TFP401/401A power down (PD = low) is a complete power down in that it powers down the digital core,
the analog circuitry, and output drivers. All output drivers are placed into a Hi-Z state. All inputs are disabled
except for the PD input. The TFP401/401A will not respond to any digital or analog inputs until PD is pulled high.
Both PDO and PD have internal pullups so if left unconnected they will default the TFP401/401A to normal
operating modes.
Sync Detect. The TFP401/401A offers an output, SCDT to indicate link activity. The TFP401/401A monitors
activity on DE to determine if the link is active. When 1 million (1e6) pixel clock periods pass without a transition
on DE, the TFP401/401A considers the link inactive and SCDT is driven low. While SCDT is low, if two DE
transitions are detected within 1600 pixel clock periods, the link will be considered active and SCDT is pulled
high.
SCDT can be used to signal a system power management circuit to initiate a system power down when the link
is considered inactive. The SCDT can also be tied directly to the TFP401/401A PDO input to power down the
output drivers when the link is inactive. It is not recommended to use the SCDT to drive the PD input since, once
in complete power-down, the analog inputs are ignored and the SCDT state will not change. An external system
power management circuit to drive PD is preferred.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TFP401PZP | 功能描述:顯示接口集成電路 PanelBus DVI Receiver 165MHz RoHS:否 制造商:Texas Instruments 電源電流:125 mA 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:WQFN-60 封裝:Reel |
| TFP401PZPG4 | 功能描述:顯示接口集成電路 PanelBus DVI Rcvr RoHS:否 制造商:Texas Instruments 電源電流:125 mA 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:WQFN-60 封裝:Reel |
| TFP403 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TI PANEBUS DIGITAL RECEIVER |
| TFP403PZP | 功能描述:顯示接口集成電路 PanelBus DVI Receiver RoHS:否 制造商:Texas Instruments 電源電流:125 mA 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:WQFN-60 封裝:Reel |
| TFP403PZPG4 | 功能描述:顯示接口集成電路 PanelBus DVI Rcvr RoHS:否 制造商:Texas Instruments 電源電流:125 mA 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:WQFN-60 封裝:Reel |
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