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參數資料
| 型號： | TFP513PAPG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.00 MM HEIGHT, 0.50 MM PITCH, HTQFP-64 |
| 文件頁數： | 8/32頁 |
| 文件大小： | 1206K |
| 代理商： | TFP513PAPG4 |
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TFP513
TI PanelBus DIGITAL TRANSMITTER
SLLS611 AUGUST 2004
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
device configuration and I2C RESET description
The TFP513 device configuration can be programmed by several different methods to allow maximum flexibility
for the user’s application. Device configuration is controlled by the state of the ISEL/RST pin, configuration pins
(BSEL, DSEL, EDGE, VREF), and state pin (PD). I2C bus select and I2C RESET (active low) are shared functions
on the ISEL/RST pin, which operates asynchronously.
Holding ISEL/RST low causes the device configuration to be set by the configuration pins (BSEL, DSEL, EDGE,
and VREF) and state pin (PD). The I2C bus is disabled.
Holding ISEL/RST high causes the device configuration to be set by the configuration bits (BSEL, DSEL, EDGE)
and state bits (PD, DKEN) in the I2C registers. The I2C bus is enabled.
Momentarily bringing ISEL/RST low and then back high while the device is operating in normal or power-down
mode resets the I2C registers to their default values, and the device configuration is changed to the default
power-up state with I2C enabled. After power up, the device must be reset. It is suggested that a low going pulse
with 100-ns minimum width be applied to this pin after all the power supplies are fully functional.
DE generator
The TFP513 contains a DE generator that can generate an internal DE signal when the original data source
does not provide one. There are several I2C programmable values that control the DE generator (see Figure 9).
Register sizes limit the supportable resolutions. DE_GEN in the DE_CTL register enables this function. When
enabled, the DE pin is ignored.
DE_TOP and DE_LIN are line counts that control the number of lines after VSYNC goes active that DE is
enabled, and the total number of lines that DE remains active, respectively. The polarity of VSYNC must be set
by VS_POL in the DE_CTL register.
DE_DLY and DE_CNT are pixel counts that control the number of pixels after HSYNC goes active that DE is
enabled, and the total number of pixels that DE remains active, respectively. The polarity of HSYNC must be
set by HS_POL in the DE_CTL register.
The TFP513 also counts the total number of HSYNC pulses between VSYNC pulses, and the total number of
pixels between HSYNC pulses. These values, the total vertical and horizontal resolutions, are available in
V_RES and H_RES, respectively. These values are available at all times, whether or not the DE generator is
enabled.
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