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參數(shù)資料
| 型號(hào)： | TLC7628IN |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 13/13頁 |
| 文件大?。?/td> | 255K |
| 代理商： | TLC7628IN |
TLC7628C
DUAL 8BIT MULTIPLYING
SLAS063B APRIL 1989 REVISED MARCH 2007
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
Table 1. Mode Selection Table
DACA/DACB
CS
WR
DACA
DACB
L
H
X
L
H
X
L
X
H
Write
Hold
Write
Hold
L = low level,
H = high level,
X = don’t care
Table 2. Unipolar Binary Code
Table 3. Bipolar (Offset Binary) Code
DAC LATCH CONTENTS
(see Note 7 )
ANALOG OUTPUT
DAC LATCH CONTENTS
(see Note 8)
ANALOG OUTPUT
MSB
LSB
ANALOG OUTPUT
MSB
LSB
ANALOG OUTPUT
1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
VI (255/256)
VI (129/256)
VI (128/256) = Vi /2
VI (127/256)
VI (1/256)
VI (0/256) = 0
1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
VI (127/128)
VI (1/128)
0 V
VI (1/128)
VI (127/128)
VI (128/128)
NOTES:
7. 1 LSB = (2 8)VI
8. 1 LSB = (2 7)VI
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| TLC7628CDWR | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| TLC7628CDWRG4 | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| TLC7628CNE4 | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20 |
| TLC7628CDWG4 | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| TLC7628CN | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20 |
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