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參數(shù)資料
型號: TLC7628IN
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 9/13頁
文件大小: 255K
代理商: TLC7628IN
TLC7628C
DUAL 8BIT MULTIPLYING
SLAS063B APRIL 1989 REVISED MARCH 2007
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
This device is capable of performing 2-quadrant or full 4-quadrant multiplication. Circuit configurations for
2-quadrant and 4-quadrant multiplication are shown in Figures 2 and 3. Input coding for unipolar and bipolar
operation are summarized in Tables 2 and 3, respectively.
17
DGND
5
16
15
6
7
14
VDD
Input
Buffer
Control
Logic
WR
CS
DACB
DACA/
DB7
DBO
VI(B)
±10 V
R3 (see Note A)
REFB
8
88
REFA
RFBA
OUTA
AGND
OUTB
RFBB
C1 (see Note B)
A1
R4 (see Note A)
C2 (see Note B)
AGND
A3
VOA
R2 (see Note A)
R1 (see Note A)
±10 V
VI(A)
+
+
VOB
RECOMMENDED TRIM
RESISTOR VALUES
R1, R3
R2, R4
500
150
Latch
DACA
Latch
DACB
NOTES: A. R1, R2, R3, and R4 are used only if gain adjustment is required. See table for recommended values. Make gain adjustment with
digital input of 255.
B. C1 and C2 phase compensation capacitors (10 pF to 15 pF) are required when using high-speed amplifiers to prevent ringing or
oscillation.
Figure 2. Unipolar Operation (2-Quadrant Multiplication)
相關(guān)PDF資料
PDF描述
TLC7628CDWR PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
TLC7628CDWRG4 PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
TLC7628CNE4 PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20
TLC7628CDWG4 PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
TLC7628CN PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20
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