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參數資料
型號: TLV320AIC27TPFB
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: PLASTIC, TQFP-48
文件頁數: 19/54頁
文件大小: 732K
代理商: TLV320AIC27TPFB
TLV320AIC27
STEREO AUDIO CODEC
SLAS253A – MARCH 2000 – REVISED SEPTEMBER 2000
26
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
waking up the ac link
There are two methods to bring the ac link out of a low-power, halted mode. Regardless of the method, it is the
AC’97 controller that performs the wake-up task.
Ac-link protocol provides for a cold and a warm TLV320AIC27 reset.
The current power-down state would ultimately dictate which form of TLV320AIC27 reset is appropriate. Unless
a cold or register reset (a write to the reset register) is performed, wherein the TLV320AIC27 registers are
initialized to their default values, registers are required to keep state during all power-down modes.
Once powered down, reactivation of the ac link via reassertion of the SYNC signal must not occur for a minimum
of four audio frame times following the frame in which the power down was triggered. When the ac link powers
up, it indicates readiness via the codec-ready bit (input slot 0, bit 15).
cold TLV320AIC27 reset
A cold reset is achieved by asserting RESETB for the minimum specified time. By driving RESETB low,
BIT_CLK, and SDATA_OUT are activated, or reactivated as the case may be, and all the TLV320AIC27 control
registers are initialized to their default power on reset values.
RESETB is an asynchronous TLV320AIC27 input.
warm TLV320AIC27 reset
A warm TLV320AIC27 reset reactivates the ac link without altering the current TLV320AIC27 register values.
A warm reset is signalled by driving SYNC high for a minimum of 1
S in the absence of BIT_CLK.
Within normal audio frames, SYNC is synchronous to the TLV320AIC27 input. However, in the absence of
BIT_CLK, SYNC is treated as an asynchronous input used in the generation of a warm reset to the
TLV320AIC27. The TLV320AIC27 does not respond to the activation of BIT_CLK until SYNC has been sampled
low again by the TLV320AIC27. This precludes the false detection of a new audio frame.
serial interface register map description (see Table 23)
The serial interface bits perform control functions described as follows (notice that the register map is fully
specified by the AC’97 specification, and this description is simply repeated below, with optional unsupported
features omitted):
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相關代理商/技術參數
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