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參數資料
| 型號： | TLV320AIC3107IRSBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 2 CHANNEL, AUDIO AMPLIFIER, PQCC40 |
| 封裝： | 5 X 5 MM, 0.40 MM PITCH, GREEN, PLASTIC, WQFN-40 |
| 文件頁數： | 24/99頁 |
| 文件大?。?/td> | 1474K |
| 代理商： | TLV320AIC3107IRSBR |
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Decay Time
Target
Level
Input
Signal
Output
Signal
AGC
Gain
Attack
Time
STEREO AUDIO DAC
SLOS545C – NOVEMBER 2008 – REVISED MARCH 2009 .............................................................................................................................................. www.ti.com
Figure 25. Typical Operation of the AGC Algorithm During Speech Recording
Note that the time constants here are correct when the ADC is not in double-rate audio mode. The time
constants are achieved using the Fsref value programmed in the control registers. However, if the Fsref is set in
the registers to, for example, 48 kHz, but the actual audio clock or PLL programming actually results in a different
Fsref in practice, then the time constants would not be correct.
The actual AGC decay time maximum is based on a counter length, so the maximum decay time scales with the
clock set up that is used. Table 1 shows the relationship of the NADC ratio to the maximum time available for the
AGC decay. In practice, these maximum times are extremely long for audio applications and should not limit any
practical AGC decay time that is needed by the system.
The TLV320AIC3107 includes a stereo audio DAC supporting sampling rates from 8 kHz to 96 kHz. Each
channel of the stereo audio DAC consists of a digital audio processing block, a digital interpolation filter, multi-bit
digital delta-sigma modulator, and an analog reconstruction filter. The DAC is designed to provide enhanced
performance at low sampling rates through increased oversampling and image filtering, thereby keeping
quantization noise generated within the delta-sigma modulator and signal images strongly suppressed within the
audio band to beyond 20 kHz. This is realized by keeping the upsampled rate constant at 128 × Fsref and
changing the oversampling ratio as the input sample rate is changed. For an Fsref of 48 kHz, the digital
delta-sigma modulator always operates at a rate of 6.144 MHz. This ensures that quantization noise generated
within the delta-sigma modulator stays low within the frequency band below 20 kHz at all sample rates. Similarly,
for an Fsref rate of 44.1 kHz, the digital delta-sigma modulator always operates at a rate of 5.6448 MHz.
The following restrictions apply in the case when the PLL is powered down and double-rate audio mode is
enabled in the DAC.
Allowed Q values = 4, 8, 9, 12, 16
Q values where equivalent Fsref can be achieved by turning on PLL
Q = 5, 6, 7 (set P = 5 / 6 / 7 and K = 16 and PLL enabled)
Q = 10, 14 (set P = 5, 7 and K = 8 and PLL enabled)
30
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3107
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV320AIC3107IRSBT | 功能描述:接口—CODEC Low Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC3107IYZFR | 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC3107IYZFT | 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC3107YZFR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER |
| TLV320AIC3110 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power Audio Codec With Audio Procsessing and Stereo Class-D Speaker Amplifier |
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