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參數資料
型號: TLV320AIC3107IRSBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 2 CHANNEL, AUDIO AMPLIFIER, PQCC40
封裝: 5 X 5 MM, 0.40 MM PITCH, GREEN, PLASTIC, WQFN-40
文件頁數: 49/99頁
文件大小: 1474K
代理商: TLV320AIC3107IRSBR
www.ti.com .............................................................................................................................................. SLOS545C – NOVEMBER 2008 – REVISED MARCH 2009
Page 0 / Register 14:
Headset / Button Press Detection Register B
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Driver Capacitive Coupling
0: Programs high-power outputs for capless driver configuration
1: Programs high-power outputs for ac-coupled driver configuration
D6(1)
R/W
0
Stereo Output Driver Configuration A
Note: do not set bits D6 and D3 both high at the same time.
0: A stereo fully-differential output configuration is not being used
1: A stereo fully-differential output configuration is being used
D5
R
0
Button Press Detection Flag
This register is a sticky bit, and will stay set to 1 after a button press has been detected, until the
register is read. Upon reading this register, the bit is reset to zero.
0: A button press has not been detected
1: A button press has been detected
D4
R
0
Headset Detection Flag
0: A headset has not been detected
1: A headset has been detected
D3(1)
R/W
0
Stereo Output Driver Configuration B
Note: do not set bits D6 and D3 both high at the same time.
0: A stereo pseudo-differential output configuration is not being used
1: A stereo pseudo-differential output configuration is being used
D2–D0
R
000
Reserved. Write only zeros to these bits.
(1)
Do not set D6 and D3 to 1 simultaneously
Page 0 / Register 15:
Left ADC PGA Gain Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
1
Left ADC PGA Mute
0: The left ADC PGA is not muted
1: The left ADC PGA is muted
D6-D0
R/W
0000000
Left ADC PGA Gain Setting
0000000: Gain = 0.0 dB
0000001: Gain = 0.5 dB 0000010: Gain = 1.0 dB
1110110: Gain = 59.0 dB
1110111: Gain = 59.5 dB
1111000: Gain = 59.5 dB
1111111: Gain = 59.5 dB
Page 0 / Register 16:
Right ADC PGA Gain Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
1
Right ADC PGA Mute
0: The right ADC PGA is not muted
1: The right ADC PGA is muted
D6-D0
R/W
0000000
Right ADC PGA Gain Setting
0000000: Gain = 0.0 dB
0000001: Gain = 0.5 dB
0000010: Gain = 1.0 dB
1110110: Gain = 59.0 dB
1110111: Gain = 59.5 dB
1111000: Gain = 59.5 dB
1111111: Gain = 59.5 dB
Copyright 2008–2009, Texas Instruments Incorporated
53
Product Folder Link(s): TLV320AIC3107
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參數描述
TLV320AIC3107IRSBT 功能描述:接口—CODEC Low Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC3107IYZFR 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC3107IYZFT 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC3107YZFR 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER
TLV320AIC3110 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power Audio Codec With Audio Procsessing and Stereo Class-D Speaker Amplifier
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