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參數(shù)資料
型號: TLV320AIC3107IRSBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 2 CHANNEL, AUDIO AMPLIFIER, PQCC40
封裝: 5 X 5 MM, 0.40 MM PITCH, GREEN, PLASTIC, WQFN-40
文件頁數(shù): 51/99頁
文件大小: 1474K
代理商: TLV320AIC3107IRSBR
www.ti.com .............................................................................................................................................. SLOS545C – NOVEMBER 2008 – REVISED MARCH 2009
Page 0 / Register 19:
LINE1L to Left ADC Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
LINE1L Single-Ended vs Fully Differential Control
If LINE1L is selected to both left and right ADC channels, both connections must use the same
configuration (single-ended or fully differential mode).
0: LINE1L is configured in single-ended mode
1: LINE1L is configured in fully differential mode
D6–D3
R/W
1111
LINE1L Input Level Control for Left ADC PGA Mix
Setting the input level control to a gain below automatically connects LINE1L to the left ADC
PGA mix
0000: Input level control gain = 0.0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3.0 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6.0 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9.0 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12.0 dB
1001–1110: Reserved. Do not write these sequences to these register bits
1111: LINE1L is not connected to the left ADC PGA
D2
R/W
0
Left ADC Channel Power Control
0: Left ADC channel is powered down
1: Left ADC channel is powered up
D1–D0
R/W
00
Left ADC PGA Soft-Stepping Control
00: Left ADC PGA soft-stepping at once per Fs
01: Left ADC PGA soft-stepping at once per two Fs
10–11: Left ADC PGA soft-stepping is disabled
Page 0 / Register 20:
LINE2L to Left ADC Control Register(1)
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
LINE2L Single-Ended vs Fully Differential Control
If LINE2L is selected to both left and right ADC channels, both connections must use the same
configuration (single-ended or fully differential mode).
0: LINE2L is configured in single-ended mode
1: LINE2L is configured in fully differential mode
D6–D3
R/W
1111
LINE2L Input Level Control for Left ADC PGA Mix
0000: Input level control gain = 0.0 dB
0001-0011: Reserved. Do not write these sequences to these register bits
0100: Input level control gain = –6.0 dB
0101-0111: Reserved. Do not write these sequences to these register bits
1000: Input level control gain = –12.0 dB
1001-1110: Reserved. Do not write these sequences to these register bits
1111: LINE2L is not connected to the left ADC PGA
D2
R/W
0
Left ADC Channel Weak Common-Mode Bias Control
0: Left ADC channel unselected inputs are not biased weakly to the ADC common-mode voltage
1: Left ADC channel unselected inputs are biased weakly to the ADC common- mode voltage
D1-D0
R
00
Reserved. Write only zeros to these register bits
(1)
LINE1R SEvsFD control is available for both left and right channels. However this setting must be same for both the channels.
Copyright 2008–2009, Texas Instruments Incorporated
55
Product Folder Link(s): TLV320AIC3107
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TLV320AIC3107IYZFT 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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