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參數資料
| 型號： | TLV320DAC32IRHBTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 21/69頁 |
| 文件大?。?/td> | 1242K |
| 代理商： | TLV320DAC32IRHBTG4 |
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STEREO AUDIO DAC
DIGITAL AUDIO PROCESSING
H(z) +
N0 ) N1
z*1
32768 * D1
z*1
(1)
N0 ) 2
N1
z*1 ) N2
z*2
32768 * 2
D1
z*1 * D2
z*2
N3 ) 2
N4
z*1 ) N5
z*2
32768 * 2
D4
z*1 * D5
z*2
(2)
SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
16.0
1
6
1440
48000.00
0.0000
19.2
1
5
1200
48000.00
0.0000
19.68
1
4
9951
47999.79
0.0004
48.0
4
1
8
1920
48000.00
0.0000
The TLV320DAC32 includes a stereo audio DAC supporting sampling rates from 8-kHz to 96-kHz. Each channel
of the stereo audio DAC consists of a digital audio processing block, a digital interpolation filter, multi-bit digital
delta-sigma modulator, and an analog reconstruction filter. The DAC is designed to provide enhanced
performance at low sampling rates through increased oversampling and image filtering, thereby keeping
quantization noise generated within the delta-sigma modulator and signal images strongly suppressed within the
audio band to beyond 20-kHz. This is realized by keeping the upsampled rate constant at 128 x Fsref and
changing the oversampling ratio as the input sample rate is changed. For an Fsref of 48-kHz, the digital
delta-sigma modulator always operates at a rate of 6.144-MHz. This ensures that quantization noise generated
within the delta-sigma modulator stays low within the frequency band below 20-kHz at all sample rates. Similarly,
for an Fsref rate of 44.1-kHz, the digital delta-sigma modulator always operates at a rate of 5.6448-MHz.
The following restrictions apply in the case when the PLL is powered down and double-rate audio mode is
enabled in the DAC.
Allowed Q values = 4, 8, 9, 12, 16
Q values where equivalent Fsref can be achieved by turning on PLL
Q = 5, 6, 7 (set P = 5 / 6 / 7 and K = 16.0 and PLL enabled)
Q = 10, 14 (set P = 5, 7 and K = 8.0 and PLL enabled)
The DAC channel consists of optional filters for de-emphasis and bass, treble, midrange level adjustment,
speaker equalization, and 3-D effects processing. The de-emphasis function is implemented by a programmable
digital filter block with fully programmable coefficients (see Page-1/Reg-21-26 for left channel, Page-1/Reg-47-52
for right channel). If de-emphasis is not required in a particular application, this programmable filter block can be
used for some other purpose. The de-emphasis filter transfer function is given by:
where the N0, N1, and D1 coefficients are fully programmable individually for each channel. The coefficients that
should be loaded to implement standard de-emphasis filters are given in Table 1.
Table 2. De-Emphasis Coefficients for Common Audio Sampling Rates
SAMPLING FREQUENCY
N0
N1
D1
32-kHz
16950
–1220
17037
44.1-kHz
15091
–2877
20555
48-kHz(1)
14677
–3283
21374
(1)
The 48-kHz coefficients listed above are used as the default values.
In addition to the de-emphasis filter block, the DAC digital effects processing includes a fourth order digital IIR
filter with programmable coefficients (one set per channel). This filter is implemented as cascade of two biquad
sections with frequency response given by:
The N and D coefficients are fully programmable, and the entire filter can be enabled or bypassed. The structure
of the filtering when configured for independent channel processing is shown below in Figure 32, with LB1
corresponding to the first left-channel biquad filter using coefficients N0, N1, N2, D1, and D2. LB2 similarly
corresponds to the second left-channel biquad filter using coefficients N3, N4, N5, D4, and D5. The RB1 and
RB2 filters refer to the first and second right-channel biquad filters, respectively.
28
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC32
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