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參數資料
| 型號： | TLV5633IPWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁數： | 12/24頁 |
| 文件大小： | 463K |
| 代理商： | TLV5633IPWRG4 |
www.ti.com
Interface
Control
4-Bit
DAC MSW
Holding
Latch
A(0,1)
CS
WE
OUT
Power-On
Reset
x2
4
5-Bit
Control
Latch
5
Powerdown
and Speed
Control
2
Voltage
Bandgap
PGA With
Output Enable
12-Bit
DAC
Register
12
REF
AGND
DVDD
LDAC
2
8-Bit
DAC LSW
Holding
Latch
8
4
D(0-7)
PWR
SPD
AVDD
SLAS190C – MARCH 1999 – REVISED SEPTEMBER 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
Terminal Functions
TERMINAL
I/O/P
DESCRIPTION
NAME
NO.
A1, A0
7, 8
I
Address input
AGND
14
P
Ground
AVDD
11
P
Positive power supply (analog part)
CS
18
I
Chip select. Digital input active low, used to enable/disable inputs
D0-D1
19, 20
I
Data input
D2-D7
1-6
I
Data input
DVDD
10
P
Positive power supply (digital part)
LDAC
16
I
Load DAC. Digital input active low, used to load DAC output
OUT
13
O
DAC analog voltage output
PWR
15
I
Power down. Digital input active low
REF
12
I/O
Analog reference voltage input/output
SPD
9
I
Speed select. Digital input
WE
17
I
Write enable. Digital input active low, used to latch data
2
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