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參數(shù)資料
| 型號(hào)： | TLV5633IPWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 21/24頁 |
| 文件大?。?/td> | 463K |
| 代理商： | TLV5633IPWRG4 |
www.ti.com
DIGITAL INPUT TIMING REQUIREMENTS
PARAMETER MEASUREMENT INFORMATION
X
Data
X
Address
X
tsu(D)
tsu(A)
th(DA)
twH(WE)
tsu(WE-LD)
tw(LD)
tsu(CS-WE)
D(0-7)
A(0,1)
CS
WE
LDAC
LSW
X
MSW
X
0
X
1
X
D(0-7)
A(0,1)
CS
WE
LDAC
SLAS190C – MARCH 1999 – REVISED SEPTEMBER 2006
MIN
NOM
MAX
UNIT
tsu(CS-WE)
Setup time, CS low before negative WE edge
15
ns
tsu(D)
Setup time, data ready before positive WE edge
10
ns
tsu(A)
Setup time, addresses ready before positive WE edge
20
ns
th(DA)
Hold time, data and addresses held valid after positive WE edge
5
ns
tsu(WE-LD)
Setup time, positive WE edge before LDAC low
5
ns
twH(WE)
Pulse duration, WE high
20
ns
tw(LD)
Pulse duration, LDAC low
23
ns
Figure 1. Timing Diagram
Figure 2. Example of a Complete Write Cycle (MSW, LSW) Using LDAC for Update
6
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