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參數資料
| 型號： | TMC3503R2C50T |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.015 us SETTLING TIME, 8-BIT DAC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數： | 16/17頁 |
| 文件大小： | 106K |
| 代理商： | TMC3503R2C50T |
TMC3503
PRODUCT SPECIFICATION
8
REV. 1.02 11/24/99
Switching Characteristics
Notes:
1. Values shown in Typ column are typical for VDD = +5V and TA = 25°C.
2. VREF = 1.235V, RLOAD = 37.5
, RREF = 590.
System Performance Characteristics
Notes:
1. Values shown in Typ column are typical for VDD = +5V and TA = 25°C.
2. VREF = 1.235V, RLOAD = 37.5
, RREF = 590.
Timing Diagram
Parameter
Conditions2
Min
Typ1
Max
Units
tD
Clock to Output Delay
VDD = Min
10
15
ns
tSKEW
Output Skew
1
2
ns
tR
Output Risetime
10% to 90% of Full Scale
2
3
ns
tF
Output Falltime
90% to 10% of Full Scale
2
3
ns
tSET
Output Settling Time
to 3%/FS
15
ns
Parameter
Conditions2
Min
Typ
1
Max
Units
ELI
Integral Linearity Error
VDD, VREF = Nom
±0.2
±0.3
%/FS
ELD
Differential Linearity Error
VDD, VREF = Nom
±0.2
±0.3
%/FS
EDM
DAC to DAC Matching
VDD, VREF = Nom
3
10
%
EG
Absolute Gain Error
VDD, VREF = Nom
TBD
%/FS
TCEG
Gain Error Tempco
VDD, VREF = Nom
TBD
PPM/°C
IOFF
Output Off Current
VDD = Max, R, G, B = 000h
SYNC = BLANK = 0
20
nA
PSRR
Power Supply Rejection
Ratio
0.05
%/%
CLK
PIXEL DATA
& CONTROLS
OUTPUT
65-3503-04
DataN
DataN+1
DataN+2
tPWL
tS
tH
50%
3%/FS
90%
10%
tD
tSET
tF
tR
tPWH
1/fS
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