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| 型號(hào)： | TMDS361PAGR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁(yè)數(shù)： | 27/43頁(yè) |
| 文件大小： | 2159K |
| 代理商： | TMDS361PAGR |
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Acknowledge
(FromReceiver)
Start
Condition
Acknowledge
(Receiver)
Acknowledge
(Receiver)
SDA
Stop
Condition
I CDevice Addressand
Read/WriteBit
2
FirstDataByte
Other
DataBytes
LastDataByte
A6
ACK
A5
A1
A0
R/W
D7
D6
D1
D0 ACK
D7
D6
D1
D0
ACK
T0397-01
S
Slave Address
W
A
Data
A
Data
A
P
Receiver
Transmitter
A =No Acknowledge(SDA High)
A = Acknowledge
S=StartCondition
P =StopCondition
W=Write
R=Read
R0008-01
Start
Condition
SDA
Acknowledge
(FromReceiver)
Acknowledge
(From Transmitter)
Not Acknowledge
(Transmitter)
Stop
Condition
LastDataByte
I CDevice Addressand
Read/WriteBit
2
FirstData
Byte
Other
DataBytes
A6
A0
ACK
R/W
D7
D0
ACK
D7
D6
D1
D0
ACK
T0398-01
Slave Address
EXAMPLE – WRITING TO THE TMDS361
www.ti.com............................................................................................................................................ SLLS919A – DECEMBER 2008 – REVISED JANUARY 2009
Figure 41. Multiple-Byte Write Transfer
Figure 42. I2C Read Cycle
Figure 43. Multiple-Byte Read Transfer
Both SDA and SCL must be connected to a positive supply voltage via a pullup resistor. These resistors should
comply with the I2C specification that ranges from 2 k
to 19 k. When the bus is free, both lines are high. The
address byte is the first byte received following the START condition from the master device. The 7-bit address is
factory preset to 0101 100. Table 7 lists the calls to which the TMDS361 responds.
Table 7. TMDS361 Slave Address
FIXED ADDRESS
READ/WRITE BIT
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (R/W)
0
1
0
1
0
1/0
The proper way to write to the TMDS361 is illustrated as follows:
An I2C master initiates a write operation to the TMDS361 by generating a start condition (S) followed by the
TMDS361 I2C address (as shown following, in MSB-first bit order, followed by a 0 to indicate a write cycle. After
receiving an acknowledge from the TMDS361, the master presents the subaddress (sink port) to be written,
consisting of one byte of data, MSB-first. The TMDS361 acknowledges the byte after completion of the transfer.
Finally, the master presents the data to be written to the register (sink port), and the TMDS361 acknowledges the
byte. The master can continue presenting data to be written after TMDS361 acknowledges the previous byte
(steps 6, 7). After the last byte to be written has been acknowledged by TMDS361, the I2C master then
terminates the write operation by generating a stop condition (P).
Step 1
0
I2C start (master)
S
Copyright 2008–2009, Texas Instruments Incorporated
33
Product Folder Link(s) :TMDS361
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