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參數資料
| 型號： | TMDS461PZIT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁數： | 2/24頁 |
| 文件大小： | 1467K |
| 代理商： | TMDS461PZIT |
PRODUCTPREVIEW
DEVICE POWER
ELECTRICAL CHARACTERISTICS
HOT PLUG DETECT and 5V DETECT
SLLS915 – AUGUST 2008 ................................................................................................................................................................................................. www.ti.com
RECOMMENDED OPERATING CONDITIONS (continued)
MIN
NOM
MAX
UNIT
VI
Input voltage
0
5.5
V
dR(I2C)
I2C data rate
100
Kbps
HPD 5V_PWR, AND CONTROL PINS
VIH
High-level input voltage
2
5.5
V
VIL
Low-level input votlage
0
0.8
V
The TMDS461 is designed to operate from a single 3.3-V supply voltage. The TMDS461 has three power modes
of operation. These three modes are referred to as normal mode, standby mode, and low-power mode.
Normal mode is designed to be used during typical operating conditions. In normal mode, the device is fully
functional and consumes the greatest amount of power.
Standby mode is designed to be used when reduced power is desired, but DDC and HPD communication must
be maintained. Standby mode can be enabled via the I2C interface. In standby mode, the high-speed TMDS data
and clock channels are disabled to reduce power consumption. The internal I2C logic, DDC, and HPD function
normally.
Low-power mode is designed to consume the least possible amount of power while still applying the 3.3 V to the
device. Low-power mode can be enabled by either the LP GPIO pin (pin 85) or by an I2C command via the
internal I2C logic. In low power mode all of the inputs and output are disabled with the exception of the internal
I2C logic and I/O. Low-power mode can be disabled by either the either the LP GPIO pin (pin 85) in GPIO mode
or by an I2C command via the internal I2C logic in the I2C mode.
Clock Detection feature in TMDS461 provides an automatic power management feature in normal mode. If there
is no valid TMDS clock detected, the terminations on the input TMDS data lines are disconnected and the TMDS
outputs are Hi-Z. As soon as a valid TMDS clock is detected, the terminations on the input TMDS data lines are
connected and TMDS outputs come out of Hi-Z, the device is fully functional and consumes the greatest amount
of power.
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ICC
Supply current (normal
LP = 3.3 V, TMDS: VID = 500 mV, 3 Gbps PRBS, HPD = 3.3 V,
216
mA
mode)
5V_PWR[1:4] = 5 V
ISTBY
Standby supply current
5
mA
ISD
Shutdown current
LP = 0V
555
A
INCLK
Supply current (normal
18
mA
mode: No TMDS clock
detected)
The TMDS461 is designed to support the Hot Plug indication to the input ports. The state of the Hot Plug output
of the selected source follows the state of the Hot Plug input. The state of the Hot Plug outputs of the
non-selected ports can be configured to either follow the state of the ports 5V_PWR, or they can be configured to
be high impedance until selected.
When in standby power mode the HPD pin will operate just as it does in normal operational mode.
10
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s) :TMDS461
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