
APPLICATION INFORMATION
Supply Voltage
TMDS Input Fail-Safe
TMDS Outputs
DDC I
2C Function Description
RSCL
RSDA
TSCL
TSDA
OVS
R
T
B0344-01
www.ti.com ............................................................................................................................................................................................... SLLS915 – JANUARY 2009
The TMDS461 is powered up with a single power source that is 3.3-V VCC for the TMDS circuitry for HPD, DDC,
and most of the control logic.
The TMDS461 incorporates clock-detect circuitry. If there is no valid TMDS clock from the connected HDMI/DVI
source, the TMDS461 does not switch on the terminations on the source-side data channels. Additionally, the
TMDS outputs are placed in the high-impedance state. This prevents the TMDS461 from turning on its outputs if
there is no valid incoming HDMI/DVI data.
A 10% precision resistor, 4.02-k
, is recommended to control the output swing to the HDMI-compliant 800-mV to
1200-mV range VOD(pp) (1000 mV typical).
The TMDS461 provides buffers on the DDC I2C lines on all four input ports. This section explains the operation
of the buffer. For representation, the source side of the TMDS461 is represented by RSCL/RSDA, and the sink
side is represented by TSCL/TSDA. The buffers on the RSCL/RSDA and TSCL/TSDA pins are 5-V tolerant when
the device is powered off and high-impedance under low supply voltage, 1.5 V or below. If the device is powered
up, the driver T (see
Figure 32) is turned on or off depending on the corresponding R-side voltage level.
When the R side is pulled low below 1.5 V, the corresponding T-side driver turns on and pulls the T side down to
a low level output voltage, VOL. The value of VOL and VIL on the T side or the sink side of the TMDS461 switch
depends on the output-voltage select (OVS) control settings. OVS control can be changed by the slave I2C, see
Table 9. When the OVS1 setting is selected, VOL is typically 0.7 V and VIL is typically 0.4 V. When the OVS2 setting is selected, VOL is typically 0.6 V and VIL is typically 0.4 V. When OVS3 setting (default) is selected, VOL is
typically 0.5 V and VIL is typically 0.3 V. VOL is always higher than the driver-R input threshold, VIL on the T side
or the sink side, preventing lockup of the repeater loop. The TMDS461 is targeted primarily as a switch in the
HDTV market and is expected to be a companion chip to an HDMI receiver; thus, the OVS control has been
provided on the sink side, so that the requirement of VIL to be less than 0.4 V can be met. The VOL value can be
selected to improve or optimize noise margins between VOL and VIL of the repeater itself or VIL of some external
device connected on the T side.
When the R side is pulled up, above 1.5 V, the T-side driver turns off and the T-side pin is high-impedance.
Figure 32. I2C Drivers in the TMDS461
= Side Is the HDMI Source Side, T Side Is the HDMI Sink Side)
When the T side is pulled below 0.4 V by an external I2C driver, both drivers R and T are turned on. Driver R
pulls the R side to near 0 V, and driver T is on, but is overridden by the external I2C driver. If driver T is already
on, due to a low on the R side, driver R just turns on.
When the T side is released by the external I2C driver, driver T is still on, so the T side is only able to rise to the
VOL of driver T. Driver R turns off, because VOL is above its 0.4-V VIL threshold, releasing the R side. If no
external I2C driver is keeping the R side low, the R side rises, and driver T turns off once the R side rises above
Copyright 2009, Texas Instruments Incorporated
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