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| 型號： | TMDS461PZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 29/43頁 |
| 文件大小： | 3111K |
| 代理商： | TMDS461PZT |
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EXAMPLE – READING FROM THE TMDS461
TMDS461 Read Phase 1
www.ti.com ............................................................................................................................................................................................... SLLS915 – JANUARY 2009
Step 1
0
I2C start (master)
S
Step 2
7
6
5
4
3
2
1
0
I2C general address (master)
0
1
0
1
0
0 (Local_Addr pin =LOW)
0
1 (Local_Addr pin = HIGH)
Step 3
8
I2C acknowledge (slave)
A
Step 4
7
6
5
4
3
2
1
0
I2C write sink logic address (master)
0
Addr
Step 5
8
I2C acknowledge (slave)
A
Step 6
7
6
5
4
3
2
1
0
I2C write data (master)
Data
Data is the register address or register data to be written
Step 7
8
I2C acknowledge (slave)
A
Step 8
0
I2C stop (master)
P
An example of the proper bit control for selecting port 2 is:
Step 4: 0000 0011
Step 6: 00101000
The read operation consists of two phases. The first phase is the address phase. In this phase, an I2C master
initiates a write operation to the TMDS461 by generating a start condition (S) followed by the TMDS461 I2C
address, in MSB-first bit order, followed by a 0 to indicate a write cycle. After receiving acknowledges from the
TMDS461, the master presents the subaddress of the register to be read. After the cycle is acknowledged (A),
the master may optionally terminate the cycle by generating a stop condition (P).
The second phase is the data phase. In this phase, an I2C master initiates a read operation to the TMDS461 by
generating a start condition followed by the TMDS461 I2C address (as shown following for a read operation), in
MSB first bit order, followed by a 1 to indicate a read cycle. After an acknowledge from the TMDS461, the I2C
master receives one byte of data from the TMDS461. The master can continue receiving data byes by issuing an
acknowledge after each byte read (steps 10, 11). After the last data byte has been transferred from the
TMDS461 to the master, the master generates a not-acknowledge followed by a stop.
Step 1
0
I2C start (master)
S
Step 2
7
6
5
4
3
2
1
0
I2C general address (master)
0
1
0
1
0
0 (Local_Addr pin =LOW)
0
1 (Local_Addr pin = HIGH)
Step 3
8
I2C acknowledge (slave)
A
Copyright 2009, Texas Instruments Incorporated
35
Product Folder Link(s) :TMDS461
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