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參數資料
型號: TMP320C6413GTS500
廠商: Texas Instruments, Inc.
元件分類: 數字信號處理
英文描述: Fixed-Point Digital Signal Processors
中文描述: 定點數字信號處理器
文件頁數: 19/140頁
文件大小: 1958K
代理商: TMP320C6413GTS500
Memory Map Summary
19
April 2004
Revised May 2005
SPRS247E
2.5
Memory Map Summary
Table 2
2 shows the memory map address ranges of the C6413 and C6410 devices. Internal memory is
always located at address 0 and can be used as both program and data memory. The external memory
address ranges in the C6413/C6410 device begin at the hex address location 0x8000 0000 for EMIFA.
Table 2
2. TMS320C6413/C6410 Memory Map Summary
MEMORY BLOCK DESCRIPTION
BLOCK SIZE
(BYTES)
HEX ADDRESS RANGE
Internal RAM (L2) [C6413]
256K
0000 0000 – 0003 FFFF
Reserved [C6413]
1024K minus 256K
0004 0000 – 000F FFFF
Internal RAM (L2) [C6410]
128K
0000 0000 – 0001 FFFF
Reserved [C6410]
1024K minus 128K
0002 0000 – 000F FFFF
Reserved
15M
0010 0000 – 00FF FFFF
Reserved
8M
0100 0000 – 017F FFFF
External Memory Interface A (EMIFA) Registers
256K
0180 0000 – 0183 FFFF
L2 Registers
256K
0184 0000 – 0187 FFFF
HPI Registers
256K
0188 0000 – 018B FFFF
McBSP 0 Registers
256K
018C 0000 – 018F FFFF
McBSP 1 Registers
256K
0190 0000 – 0193 FFFF
Timer 0 Registers
256K
0194 0000 – 0197 FFFF
Timer 1 Registers
256K
0198 0000 – 019B FFFF
Interrupt Selector Registers
256K
019C 0000 – 019F FFFF
EDMA RAM and EDMA Registers
256K
01A0 0000 – 01A3 FFFF
Reserved
512K
01A4 0000 – 01AB FFFF
Timer 2 Registers
256K
01AC 0000 – 01AF FFFF
GP0 Registers
256K minus 4K
01B0 0000 – 01B3 EFFF
Device Configuration Registers
4K
01B3 F000 – 01B3 FFFF
I2C0 Data and Control Registers
16K
01B4 0000 – 01B4 3FFF
I2C1 Data and Control Registers
16K
01B4 4000 – 01B4 7FFF
Reserved
16K
01B4 8000 – 01B4 BFFF
McASP0 Control Registers
16K
01B4 C000 – 01B4 FFFF
McASP1 Control Registers
16K
01B5 0000 – 01B5 3FFF
Reserved
176K
01B5 4000 – 01B7 FFFF
Reserved
128K
01B8 0000 – 01B9 FFFF
Reserved
128K
01BA 0000 – 01BB FFFF
Emulation
256K
01BC 0000 – 01BF FFFF
Reserved
528K
01C0 0000 – 01C8 3FFF
Reserved
3.5M
01C8 4000 – 01FF FFFF
QDMA Registers
52
0200 0000 – 0200 0033
Reserved
928M minus 52
0200 0034 – 2FFF FFFF
McBSP 0 Data
64M
3000 0000 – 33FF FFFF
McBSP 1 Data
64M
3400 0000 – 37FF FFFF
Reserved
64M
3800 0000 – 3BFF FFFF
McASP0 Data
1M
3C00 0000 – 3C0F FFFF
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