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參數資料
| 型號： | TPA6140A2YFFT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PBGA16 |
| 封裝： | 1.6 X 1.6 MM, 0.4 MM PITCH, GREEN, DSBGA-16 |
| 文件頁數： | 13/30頁 |
| 文件大小： | 705K |
| 代理商： | TPA6140A2YFFT |
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Register(N)
8-BitDatafor
Register(N+1)
A6
A5
A4
A3
A2
A1
A0
R/W ACK A7
A6
A5
A4
A3
A2
A1
A0 ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Start
Condition
Stop
Condition
Acknowledge
I2CDeviceAddressand
Read/WriteBit
Register
DataByte
SLOS598A – MARCH 2009 – REVISED OCTOBER 2009................................................................................................................................................. www.ti.com
Figure 32. Typical I2C Sequence
There is no limit on the number of bytes that can be transmitted between start and stop conditions. When the last
word transfers, the master generates a stop condition to release the bus. A generic data transfer sequence is
shown in Figure 32.
SINGLE-AND MULTIPLE-BYTE TRANSFERS
The serial control interface supports both single-byte and multi-byte read/write operations for all registers.
During multiple-byte read operations, the TPA6140A2 responds with data, a byte at a time, starting at the register
assigned, as long as the master device continues to respond with acknowledges.
The TPA6140A2 supports sequential I2C addressing. For write transactions, if a register is issued followed by
data for that register and all the remaining registers that follow, a sequential I2C write transaction has taken
place. For I2C sequential write transactions, the register issued then serves as the starting point, and the amount
of data subsequently transmitted, before a stop or start is transmitted, determines to how many registers are
written.
SINGLE-BYTE WRITE
As shown in Figure 33, a single-byte data write transfer begins with the master device transmitting a start
condition followed by the I2C device address and the read/write bit. The read/write bit determines the direction of
the data transfer. For a write data transfer, the read/write bit must be set to 0. After receiving the correct I2C
device address and the read/write bit, the TPA6140A2 responds with an acknowledge bit. Next, the master
transmits the register byte corresponding to the TPA6140A2 internal memory address being accessed. After
receiving the register byte, the TPA6140A2 again responds with an acknowledge bit. Finally, the master device
transmits a stop condition to complete the single-byte data write transfer.
Figure 33. Single-Byte Write Transfer
MULTIPLE-BYTE WRITE AND INCREMENTAL MULTIPLE-BYTE WRITE
A multiple-byte data write transfer is identical to a single-byte data write transfer except that multiple data bytes
are transmitted by the master device to the TPA6140A2 as shown in Figure 34. After receiving each data byte,
the TPA6140A2 responds with an acknowledge bit.
20
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TPA6140A2
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TPA6140A2YFFT | 制造商:Texas Instruments 功能描述:Audio Power Amplifier IC |
| TPA6141A2 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:CLASS-G DIRECTPATH? STEREO HEADPHONE AMPLIFIER |
| TPA6141A2YFFEVM | 功能描述:音頻 IC 開發工具 TPA6141A2YFF Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TPA6141A2YFFR | 功能描述:音頻放大器 25mW Class-G Direct Path St Headph Amp RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TPA6141A2YFFT | 功能描述:音頻放大器 25mW Class-G Direct Path St Headph Amp RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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