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參數資料
| 型號： | TPS2346PWRG4 |
| 廠商： | Texas Instruments |
| 文件頁數： | 22/30頁 |
| 文件大小： | 490K |
| 描述： | IC HOT SWAP POWER MGR 24-TSSOP |
| 標準包裝： | 2,000 |
| 類型： | 熱交換控制器 |
| 應用： | 光纖學網絡（ONET） |
| 內部開關： | 無 |
| 電源電壓： | -5.2V，3.3V，5V，5.15V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
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TPS2346
SLUS529 MAY 2002
22
www.ti.com
APPLICATION INFORMATION
The LCA reference ramp tracks the IRAMP pin voltage up to a level of V
O(IRAMP)
` 1.35 V. This corresponds
to the maximum sense voltage (VINx CSx) of 20 mV (150 mV for Channel 4). If charging of the load input bulk
capacitance completes during the constant di/dt section of channel turn-on (the set of dashed lines in Figure 20),
the load current decays to the steady-state operating level. With decreasing load current, the CSx input is pulled
to the VINx potential, and the pass MOSFET gate is driven to the LCA supply rail, fully enhancing the external
MOSFET. However, under certain combinations of bulk capacitance, IMAX, and inrush di/dt relative values, the
current ramp may reach the IMAX limit. The variable current source is switched out for the constant current
source which sets the VMAX reference level (see Figure 2). This defines the third stage of the load current
waveform. Load voltage ramping completes at the IMAX level, as shown by the set of solid lines in Figure 20.
Again, once the current demand rolls off, the LCA drives the pass MOSFET gate high to fully enhance the
MOSFET.
ramp-down sequence
A normal shutdown sequence occurs when the ENABLE
input is brought high ( greater than 2 V) with the output
supplies in a healthy state (no overvoltage, undervoltage or overcurrent faults). PG
is deasserted and the
back-end voltages are sequenced off in the reverse order of turn on: 5.2-V, 3.3-V, 5-V and 5.15-V (Channel 4,
Channel 3, Channel 2 and then Channel 1). The turn off is also controlled by five pulses at the IRAMP pin. The
first pulse, which is of short duration, disables the voltage fault monitoring on Channel 4 (5.2 V). Starting with
the second pulse, each supply is turned off in order. At the start of each pulse at IRAMP, voltage fault monitoring
is disabled for the next successive channel to be turned off. The IRAMP capacitor is charged rapidly, up to the
1.5-V threshold, at which point the variable current source in the LCA block is reselected to generate the current
limit reference. At the same time, the charging source at IRAMP is replaced with a 58-礎 discharge load, such
that the IRAMP capacitor is discharged at the same rate used for di/dt control during turn on. This causes the
current limit to decrease linearly, so that available load current is forced off no faster than the falling edge at
IRAMP. The LCA is disabled, and additional pull-downs applied to the GATEx pin, when either the output voltage
has decayed to less than 0.9 V, or the IRAMP waveform has decayed to approximately 0.1 V. Under conditions
of light loading during turn off, the bulk capacitance may hold up the back-end voltage even after the MOSFET
switch is turned off. In this situation, the TPS2346 waits for load discharge to less than 0.9 V prior to proceeding
to the next channel. Channel 4 is the exception to this operation; the VS4 status is not monitored during turn off,
and the device sequences to Channel 3 turn-off once the second IRAMP pulse ends.
setting the sense resistor values
Due to the current limiting operation of the internal LCAs, the maximum allowable load current for the application
is easily programmed by selecting the appropriate value sense resistors. The LCA acts to limit the CSx voltage
(relative to VINx) to the internal reference, which during steady-state operation is VMAX. Therefore, a sense
resistor for each channel can be calculated from equation (1).
R
SNSx
+
VMAXx
IMAXx
where
R
SNSx
is the the sense resistor value for Channel x,
VMAXx is the IMAX sense voltage limit, and
IMAXx is the Channel x maximum load current.
(1)
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