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參數資料
型號: TPS40042DRCTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩壓器
英文描述: SWITCHING CONTROLLER, 700 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, GREEN, PLASTIC, SON-10
文件頁數: 2/35頁
文件大小: 746K
代理商: TPS40042DRCTG4
www.ti.com
APPLICATION INFORMATION
Functional Description
Voltage Reference Input
Voltage Error Amplifier
Loop Compensation
FB
t
R
C
FB
0.4 V
e
10 A
R
-
÷
è
<
m
(1)
Oscillator
UVLO
SLUS777 – NOVEMBER 2007
The TPS40042 is a fixed frequency voltage mode synchronous buck controller. In operation, the Synchronous
Rectifier (SR) is allowed to conduct current in both directions, allowing a converter to operate in continuous
cnduction (CCM) mode, even under no load conditions, simplifying feedback loop compensation requirements.
During startup, internal circuitry modulates the switching of the synchronous rectifier to prevent discharging of the
output if a pre-biased condition exists.
An external voltage reference input is required. During operation, the voltage must be between 0.5v and 1.5v.
REFIN may be used in either of two ways:
As a reference input. In this case, REFIN must be stable before the TPS40042 is enabled. the internal
soft-start controls the rate of rise of the output voltage during startup. The time to reach output voltage
regulation is dependent on the voltage on the REFIN pin.
As a tracking input. If REFIN is held to zero until soft-start has completed (7.6-ms), then REFIN will control
the output voltage during startup and regulation.
The error amplifier has a bandwidth of greater than 5 MHz, and open loop gain of at least 55 dB. The output
voltage swing is limited to just above and below the oscillator ramp levels to improve transient response.
Voltage mode buck type converters are typically compensated using Type III networks. Please refer to the
Design Example for detailed methodology in designing feedback loops for voltage mode converters.
When designing the compensation for the feedback loop, remember that a low
impedance compensation network combined with a long network time constant
DESIGN
can cause the short circuit threshold setting to not be as expected. The time
HINT:
constant and impedance of the network connected from COMP to FB should be
as shown in Equation 1 to guarantee no interaction with the short circuit
threshold setting.
where
t is 1 ms, the sampling time of the short circuit threshold setting circuit
R
FB and CFB are the values of the feedback components. e.g. R3 and C4 of the Design Example.
The oscillator frequency is internally fixed. The TPS40042 operating frequencies is nominally 600 kHz.
When the input voltage is below the UVLO threshold, the TPS40042 turns off the internal oscillator and holds all
gate drive outputs in the low (OFF) state. When the input rises above the UVLO threshold, and the EN pin is
below the turn ON threshold, the start-up sequence is allowed to begin.
10
Copyright 2007, Texas Instruments Incorporated
Product Folder Link(s): TPS40042
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TPS40050PWPR 功能描述:DC/DC 開關控制器 Wide Input Vltg Synch Buck Cntrlr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK
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