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參數資料
| 型號： | TPS40075RHLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC20 |
| 封裝： | PLASTIC, QFN-20 |
| 文件頁數： | 40/44頁 |
| 文件大?。?/td> | 806K |
| 代理商： | TPS40075RHLR |
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SLUS676A – MAY 2006 – REVISED SEPTEMBER 2007
ELECTRICAL CHARACTERISTICS (continued)
TA = –40°C to 85°C, VIN = 12 Vdc, RT = 90.9 k, IKFF = 300 A, fSW = 500 kHz, all parameters at zero power dissipation
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tOFF
Off time during a fault (SS cycle times)
7
cycles
VSW
Switching level to end precondition(1)
(VVDD - VSW)
2
V
tPC
Precondition time (2)
100
ns
VILIM(pre)
Current limit precondition voltage threshold(2)
6.8
V
OUTPUT DRIVERS
tHFALL
High-side driver fall time(2)
36
CHDRV = 2200 pF, (HDRV - SW)
ns
tHRISE
High-side driver rise time(2)
48
tHFALL
High-side driver fall time(2)
72
CHDRV = 2200 pF, (HDRV - SW)
ns
VVDD= 4.5 V
tHRISE
High-side driver rise time(2)
96
tLFALL
Low-side driver fall time(2)
24
CLDRV = 2200 pF
ns
tLRISE
Low-side driver rise time(2)
48
tLFALL
Low-side driver fall time(2)
48
CLDRV = 2200 pF, VDD= 4.5 V
ns
tLRISE
Low-side driver rise time(2)
96
IHDRV= -0.01 A, (VBOOST- VHDRV)
0.7
1.0
VOH
High-level output voltage, HDRV
V
IHDRV = -0.1 A, (VBOOST - VHDRV)
0.95
1.35
(VHDRV - VSW), IHDRV = 0.01A
0.06
0.10
VOL
Low-level output voltage, HDRV
V
(VHDRV - VSW), IHDRV = 0.1 A
0.65
1.00
(VDBP - VLDRV), ILDRV= -0.01A
0.65
1.00
VOH
High-level output voltage, LDRV
V
(VDBP - VLDRV), ILDRV = -0.1 A
0.875
1.300
ILDRV = 0.01 A
0.03
0.05
VOL
Low-level output voltage, LDRV
V
ILDRV = 0.1 A
0.3
0.5
BOOST REGULATOR
VBOOST
Output voltage
VVDD= 12 V
15.2
17.0
V
UVLO
VUVLO
Programmable UVLO threshold voltage
RKFF = 90.9 k, turn-on, VVDD rising
6.2
7.2
8.2
Programmable UVLO hysteresis
RKFF = 90.9 k
1.10
1.55
2.00
V
Fixed UVLO threshold voltage
Turn-on, VVDD rising
4.15
4.30
4.45
Fixed UVLO hysteresis
275
365
mV
POWER GOOD
VPGD
Powergood voltage
IPGD = 1 mA
370
550
VFBH
High-level output voltage, FB
770
mV
VFBL
Low-level output voltage, FB
630
SENSE AMPLIFIER
VSA+ = VSA- = 1.25 V, Offset referenced to
VIO
Input offset voltage
-9
9
mV
SA+ and SA-
ADIFF
Differential gain
VSA+ - VSA- = 4.5 V
0.995
1.000
1.005
VICM
Input common mode range(3)
0
6
V
RG
Internal resistance for setting gain
14
20
26
k
IOH
Output source current
2
10
15
mA
IOL
Output sink current
15
25
35
GBWP
Gain bandwidth(4)
2
MHz
THERMAL SHUTDOWN
(2)
Ensured by design. Not production tested.
(3)
3 V at internal amplifier terminals, 6 V at SA+ and SA- pins.
(4)
Ensured by design. Not production tested.
Copyright 2006–2007, Texas Instruments Incorporated
5
Product Folder Link(s) :TPS40075
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