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參數資料
| 型號： | TPS40101RGET |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 1.3 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC24 |
| 封裝： | PLASTIC, QFN-24 |
| 文件頁數： | 34/37頁 |
| 文件大小： | 774K |
| 代理商： | TPS40101RGET |
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SLUS726 – SEPTEMBER 2006
DEVICE INFORMATION (continued)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
Output of an internal 5-V regulator. A 1-
F bypass capacitor should be connected from this
5VBP
14
O
pin to PGND. Power for external circuitry may be drawn from this pin. The total gate drive
current and external current draw should not cause the device to exceed thermal capabilities
The bypassed supply for internal device circuitry. Connect a 0.1-
F or greater ceramic
BIAS
8
O
capacitor from this pin to GND.
Gate drive voltage for the high-side N-channel MOSFET. An external diode must be
BST
15
I
connected from 5VBP (A) to BST(K). A schottky diode is recommended for this purpose. A
capacitor must be connected from this pin to the SW pin.
Output of the error amplifier. A feedback network is connected from this pin to the FB pin for
COMP
1
O
control loop compensation.
Inverting input to the error amplifier. In normal operation the voltage on this pin is equal to
FB
2
I
the internal reference voltage (approximately 690 mV).
GM
11
I
Connect a resistor from this pin to GND to set the gain of the current sense amplifier.
Low power or signal ground for the device. All signal level circuits should be referenced to
GND
9
-
this pin unless otherwise noted.
HDRV
16
O
Floating gate drive for the high side N-channel MOSFET.
Current limit pin used to set the overcurrent threshold and transient ride out time. An internal
current source that is proportional to the inductor current sets a voltage on a resistor
ILIM
6
O
connected from this pin to GND. When this voltage reaches 1.48 V, an overcurrent condition
is declared by the device. Adding a capacitor in parallel with the resistor to GND sets a time
delay that can be used to help avoid nuisance trips.
Current input from the inductor DCR sensing. This input signal is one of the inputs of the
ISNS
19
I
current sense amplifier for over current detection.
LDRV
13
O
Gate drive for the N-channel synchronous rectifier.
Margin down pin used for load stress test. When this pin is pulled to GND through less than
MGD
23
I
10 k
, the output voltage is decreased by 5%. The 3% margin down at the output voltage is
accommodated when this pin is connected to GND through a 30-k
resistor.
Margin up pin used for load stress test. When this pin is pulled to GND through less than 10
MGU
24
I
k
, the output voltage is increased by 5%. The 3% margin up at the output voltage is
accommodated when this pin is connected to GND through a 30-k
resistor.
Open drain power good output for the device. This pin is pulled low when the voltage at the
PG
21
O
FB pin is more than 10% higher or lower than 690 mV, a UVLO condition exists, soft-start is
active, tracking is active, an overcurrent condition exists or the die is over temperature.
PGND
12
-
Power ground for internal drivers
RT
7
I
A resistor connected from this pin to GND sets operating frequency.
Soft-start programming pin. A capacitor connected from this pin to ground programs the
SS
10
I
soft-start time. This pin is also used as a time out function during an overcurrent event.
Connected to the switched node of the converter. This pin is the return line for the flying high
SW
17
I
side driver.
Rising edge triggered synchronization input for the device. This pin can be used to
SYNC
22
I
synchronize the oscillator frequency to an external master clock. This pin may be left floating
or grounded if the function is not used.
Control input allowing simultaneous startup of multiple controllers. The converter output
TRKIN
4
I
tracks TRKIN voltage with a small controlled offset (typically 25 mV) when the tracking
amplifier is used. See application secttion for more information.
Output of the tracking amplifier. If the tracking feature is used, this pin should be connected
to FB pin through a resistor in series with a diode. The resistor value can be calculated from
TRKOUT
3
O
the equivalent impedance at the FB node. The diode should be a low leakage type to
minimize errors due to diode reverse current. For further information on compensation of the
tracking amplifier refer to the application information
Provides for programming the undervoltage lockout level and serves as a shutdown input for
UVLO
5
I
the device.
VDD
18
I
Supply voltage for the device.
VO
20
I
Output voltage. This is the reference input to the current sense amplifier.
6
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