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參數資料
| 型號： | TPS54010PWPG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 25 A SWITCHING REGULATOR, 762 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | GREEN, PLASTIC, HTSSOP-28 |
| 文件頁數： | 14/29頁 |
| 文件大小： | 984K |
| 代理商： | TPS54010PWPG4 |
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ERROR AMPLIFIER
VOLTAGE REFERENCE
PWM CONTROL
OSCILLATOR AND PWM RAMP
Switching Frequency +
100 kW
R
500 [kHz]
(27)
TPS54010
SLVS509B – MAY 2004 – REVISED JUNE 2005
External loading on VBIAS is allowed, with the
caution that internal circuits require a minimum
The high-performance, wide bandwidth, voltage error
VBIAS of 2.7 V, and external loads on VBIAS with ac
amplifier sets the TPS54010 apart from most dc/dc
or digital-switching noise may degrade performance.
converters. The user is given the flexibility to use a
The VBIAS pin may be useful as a reference voltage
wide range of output L and C filter components to suit
for external circuits. VBIAS is derived from the VIN
the particular application needs. Type-2 or Type-3
pin; see the functional block diagram of this data
compensation can be employed using external com-
sheet.
pensation components.
The voltage reference system produces a precise Vref
Signals from the error amplifier output, oscillator, and
signal by scaling the output of a temperature stable
current limit circuit are processed by the PWM control
bandgap circuit. During manufacture, the bandgap
logic. Referring to the internal block diagram, the
and scaling circuits are trimmed to produce 0.891 V
control logic includes the PWM comparator, OR gate,
at the output of the error amplifier, with the amplifier
PWM latch, and portions of the adaptive dead-time
connected as a voltage follower. The trim procedure
and control-logic block. During steady-state operation
adds
to
the
high-precision
regulation
of
the
below
the
current
limit
threshold,
the
PWM
TPS54010, because it cancels offset errors in the
comparator output and oscillator pulse train alter-
scale and error amplifier circuits.
nately reset and set the PWM latch. Once the PWM
latch is set, the low-side FET remains on for a
minimum duration set by the oscillator pulse width.
During this period, the PWM ramp discharges rapidly
The oscillator frequency is set to an internally fixed
to its valley voltage. When the ramp begins to charge
value of 350 kHz. The oscillator frequency can be
back up, the low-side FET turns off and high-side
externally adjusted from 280 to 700 kHz by con-
FET turns on. As the PWM ramp voltage exceeds the
necting a resistor between the RT pin to ground. The
error amplifier output voltage, the PWM comparator
switching frequency is approximated by the following
resets the latch, thus turning off the high-side FET
equation, where R is the resistance from RT to
and turning on the low-side FET. The low-side FET
AGND:
remains on until the next oscillator pulse discharges
the PWM ramp. During transient conditions, the error
amplifier output could be below the PWM ramp valley
External synchronization of the PWM ramp is poss-
voltage or above the PWM peak voltage. If the error
ible over the frequency range of 330 kHz to 700 kHz
amplifier is high, the PWM latch is never reset, and
by driving a synchronization signal into SYNC and
the high-side FET remains on until the oscillator pulse
connecting a resistor from RT to AGND. Choose a
signals the control logic to turn the high-side FET off
resistor between the RT and AGND which sets the
and the low-side FET on. The device operates at its
free running frequency to 80% of the synchronization
maximum duty cycle until the output voltage rises to
signal. The following table summarizes the frequency
the regulation set-point, setting VSENSE to approxi-
selection configurations:
mately the same voltage as VREF. If the error
amplifier output is low, the PWM latch is continually
SWITCHING
SYNC PIN
RT PIN
reset and the high-side FET does not turn on. The
FREQUENCY
low-side FET remains on until the VSENSE voltage
350 kHz, internally
Float or AGND
Float
decreases
to
a
range
that
allows
the
PWM
set
comparator to change states. The TPS54010 is
550 kHz, internally
≥ 2.5 V
Float
capable of sinking current continuously until the
set
output reaches the regulation set-point.
Externally set 280
Float
R = 180 k
to 68 k
kHz to 700 kHz
If the current limit comparator trips for longer than
Externally
Synchronization
R = RT value for 80%
100 ns, the PWM latch resets before the PWM ramp
synchronized fre-
signal
of external
exceeds the error amplifier output. The high-side FET
quency
synchronization fre-
turns off and low-side FET turns on to decrease the
quency
energy in the output inductor and consequently the
output current. This process is repeated each cycle in
which the current limit comparator is tripped.
21
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相關代理商/技術參數 |
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| TPS54010PWPR | 功能描述:直流/直流開關調節器 2.2V-4.0V 14A Otp Buck PWM Switch RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS54010PWPRG4 | 功能描述:直流/直流開關調節器 2.2V-4.0V 14A Otp Buck PWM Switch RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS5401DGQ | 功能描述:直流/直流開關調節器 3.5V-42Vin,0.5A Step Down SWIFT RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS5401DGQR | 功能描述:直流/直流開關轉換器 3.5V-42Vin,0.5A Step Down SWIFT RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數量:2 最大工作溫度:+ 85 C 安裝風格:SMD/SMT |
| TPS5401DGQT | 功能描述:直流/直流開關轉換器 3.5V-42Vin,0.5A Step Down SWIFT RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數量:2 最大工作溫度:+ 85 C 安裝風格:SMD/SMT |
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