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參數資料
型號: TPS54160DGQR
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩壓器
英文描述: 2.7 A SWITCHING REGULATOR, 2500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: GREEN, PLASTIC, MSOP-10
文件頁數: 26/50頁
文件大小: 1375K
代理商: TPS54160DGQR
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)
(
)
(
)
(
)
(
)
-
=
OUT
IN min
OUT
CI rms
IN min
V
I
V
(
)
D
=
OUT max
IN
SW
I
0.25
V
C
f
SLVS795C – OCTOBER 2008 – REVISED OCTOBER 2010
www.ti.com
For this example design, a ceramic capacitor with at least a 20 V voltage rating is required to support the
maximum input voltage. Common standard ceramic capacitor voltage ratings include 4 V, 6.3 V, 10 V, 16 V, 25
V, 50 V or 100 V, so a 25 V capacitor should be selected. For this example, two 2.2 mF, 25 V capacitors in
parallel have been selected. Table 2 shows a selection of high voltage capacitors. The input capacitance value
determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 39.
Using the design example values
IOUT(max) = 1.5 A
CIN = 4.4 mF
SW = 1200 kHz
yields an input voltage ripple of 71 mV and a rms input ripple current of 0.701A.
(38)
(39)
Table 2. Capacitor Types
VENDOR
VALUE (mF)
EIA Size
VOLTAGE (V)
DIALECTRIC
COMMENTS
1.0 to 2.2
100
1210
GRM32 series
1.0 to 4.7
50
Murata
1.0
100
1206
GRM31 series
1.0 to 2.2
50
1.0 10 1.8
50
2220
1.0 to 1.2
100
Vishay
VJ X7R series
1.0 to 3.9
50
2225
1.0 to 1.8
100
X7R
1.0 to 2.2
100
1812
C series C4532
1.5 to 6.8
50
TDK
1.0. to 2.2
100
1210
C series C3225
1.0 to 3.3
50
1.0 to 4.7
50
1210
1.0
100
AVX
X7R dielectric series
1.0 to 4.7
50
1812
1.0 to 2.2
100
Slow Start Capacitor
The slow start capacitor determines the minimum amount of time it will take for the output voltage to reach its
nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This
is also used if the output capacitance is large and would require large amounts of current to quickly charge the
capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the
TPS54160 reach the current limit or excessive current draw from the input power supply may cause the input
voltage rail to sag. Limiting the output voltage slew rate solves both of these problems.
The slow start time must be long enough to allow the regulator to charge the output capacitor up to the output
voltage without drawing excessive current. Equation 40 can be used to find the minimum slow start time, tss,
necessary to charge the output capacitor, Cout, from 10% to 90% of the output voltage, Vout, with an average
slow start current of Issavg. In the example, to charge the 47mF output capacitor up to 3.3V while only allowing
the average input current to be 0.125A would require a 1 ms slow start time.
32
Copyright 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS54160
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