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參數資料
| 型號： | TPS65182BRGZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 7 X 7 MM, 0.9 MM, PLASTIC, QFP-48 |
| 文件頁數： | 4/24頁 |
| 文件大小： | 865K |
| 代理商： | TPS65182BRGZT |
VIN
PWR0
PWR1
PWR2
PWR3
WAKEUP
VNEG
VCOM
VEE
VPOS
VDDH
PWR_GOOD
VN
VB
D1
6ms
(2,5)
1ms
(5)
2ms
(5)
1ms
(5)
D2
D3
D0
1.8ms
(1)
11 .8ms (min)
DLY 3
DLY 2
DLY 1
DLY 0
DLY 1
DLY 2
DLY 0 + 4ms
(2)
DLY 3
300 us (max)
STANDBY
ACTIVE
SLEEP
ACTIVE
(1) Minimum delay time between WAKEUP rising edge and IC rady to accept I 2C transaction .
(2) It takes 2ms minimum for each internal boost regulator to start up before VNEG can be enabled .
(5) It takes up to 2ms for LDOs (VPOS,VNEG) and 1ms for charge pumps (VDDH,VEE), to reach their steady state after being enabled.
DLY 0-DLY 3 are power up /down delays are factory -set to 2ms.
SLVSAA2C – MARCH 2010 – REVISED OCTOBER 2010
www.ti.com
Figure 2. Power-Up and Power-Down Timing Diagram
SOFTSTART
Softstart for DCDC1, DCDC2, LDO1, and LDO2 is accomplished by lowering the current limits during start-up. If
DCDC1 or DCDC2 are unable to reach power-good status within 10 ms, the device enters STANDBY mode.
VCOM ADJUSTMENT
VCOM can be adjusted by an external potentiometer by connecting a potentiometer to the VCOM_XADJ pin. The
potentiometer must be connected between ground and a negative supply. The gain from VCOM_XADJ to VCOM
is 1 and therefore the voltage applied to VCOM_XADJ pin should range from -0.3 to -2.5V.
12
Copyright 2010, Texas Instruments Incorporated
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