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參數(shù)資料
| 型號： | TS(X)8387MF_ |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 31/38頁 |
| 文件大小： | 617K |
| 代理商： | TS(X)8387MF_ |
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TS8387
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11. STATUS (August 1998)
Subject : TS8387/TS8388 specification update
Dear customer,
You have already used or you are considering to use our high speed ADC’s : TS8387/8388.
Thomson–TCS is announcing an upgraded version for the 1 GSPS versions : JTS8388/TS8388.
The 500 MSPS version TS8387 will not be modified.
You will find here enclosed :
– a description of the modification of the design : TS8388
– a status of the set of data sheet
– a status on the availability of each device
For any technical information, contact :
– Hotline : email : std.hotline@tcs.thomson.fr
– Bertrand WOESTELANDT :
tel :
33 (0) 4 76 58 34 29
fax :
33 (0) 4 76 58 31 25
Email : woestelandt@tcs.thomson.fr
Products
Description
Comments
Mask
8bit 500MSPS
TS8387F
8bit 500MSPS in CQFP68 package
final version
VE04A
TSEV8387F
8bit 500MSPS ADC in CQFP68 package evalua-
tion board
final version
VE04A
8bit 1 GSPS
TSX8388F
8bit 1GSPS ADC in CQFP68 package
1st version
prototype only
VE04A
TSXEV8388F
8bit 1GSPS ADC in CQFP68 package evaluation
board
1st version
prototype only
VE04A
JTSX8388
8bit 1GSPS ADC in die form
1st version
prototype only
VE04A
TSXEV8388
8bit 1GSPS ADC
chip evaluation board
1st version
prototype only
VE04A
TS8388BF
8bit 1GSPS ADC in CQFP68 package
final version
VH25A
TSEV8388BF
8bit 1GSPS ADC in CQFP68 package evaluation
board
final version
VH25A
JTS8388B
8bit 1GSPS ADC in die form
final version
VH25A
TSEV8388B
8bit 1GSPS ADC
chip evaluation board
final version
VH25A
1. Main modifications of the design : TS8388
HNew mask set : VE04A (current) is becoming VH25A (new design).
HPad out and die size are fully compatible for the current and final version of the JTS8388/TS8388F.
HDie thickness will change from 450 m (current version) to 380 m (final version) for the device (JTS8388B) in die
form
HTS8388BF and JTS8388B (final version) will work either in Gray or in binary output coding up to 1.4GSPS (maximum
sampling rate).
HPeak performance will be obtained at 50/50 external clock duty cycle instead of 40/60 in the first (VE04A) design (modi-
fication of the timer).
HData ready output frequency (DR) will be Fclock/2 in the new JTS8388B/TS8388BF design (VH25A) in order to facili-
tate high speed acquisition and the triggering of an external DMUX.
相關(guān)PDF資料 |
PDF描述 |
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| TS(X)8387MFB/C | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS(X)8387CF_ | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS(X)8387MF | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS(X)8387MFDSSC/SMD | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8387MFDSSC/SMD | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
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