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參數資料
| 型號： | TS8388BVFSB/Q |
| 廠商： | ATMEL CORP |
| 元件分類： | ADC |
| 英文描述： | 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數： | 26/47頁 |
| 文件大小： | 1230K |
| 代理商： | TS8388BVFSB/Q |
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32
TS8388BF
2144A–BDC–04/02
Out of Range Bit
An Out of Range (OR, ORB) bit is provided that goes to logical high state when the input
exceeds the positive full scale or falls below the negative full scale.
When the analog input exceeds the positive full scale, the digital output datas remain at high
logical state, with (OR, ORB) at logical one.
When the analog input falls below the negative full scale, the digital outputs remain at logical
low state, with (OR, ORB) at logical one again.
Gray or Binary
Output Data
Format Select
The TS8388BF internal regeneration latches indecision (for inputs very close to latches
threshold) may produce errors in the logic encoding circuitry and leading to large amplitude
output errors.
This is due to the fact that the latches are regenerating the internal analog residues into logical
states with a finite voltage gain value (Av) within a given positive amount of time
(t):
Av = exp(
(t)/τ), with τ the positive feedback regeneration time constant.
The TS8388BF has been designed for reducing the probability of occurrence of such errors to
approximately 10-13 (targeted for the TS8388BF at 1 GSPS).
A standard technique for reducing the amplitude of such errors down to ± 1 lsb consists of out-
putting the digital datas in Gray code format. Though the TS8388BF has been designed for
featuring a Bit Error Rate of 10-13 with a binary output format, it is possible for the user to
select between the Binary or Gray output data format, in order to reduce the amplitude of such
errors when occurring, by storing Gray output codes.
Digital Datas format selection:
BINARY output format if GORB is floating or V
CC.
GRAY output format if GORB is connected to ground (0V).
Diode Pin 49
One single pin is used for both DRRB input command and die junction monitoring. The pin
denomination is DRRB/DIOD. Temperature monitoring and Data Ready control by DRRB is
not possible simultaneously.
Ready Reset input command).
The operating die junction temperature must be kept below 145
°C, therefore an adequate
cooling system has to be set up. The diode mounted transistor measured Vbe value versus
junction temperature is given below.
Figure 38. Diode Pin 49
600
640
680
720
760
800
840
880
920
960
1000
-55
-35
-15
5
25
45
65
85
105
125
VBE
(mV)
Junction temperature (
°C)
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| TS8388BVFB/Q | 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
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| TS8388BVFSB/Q | 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8388BCF | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
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