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參數(shù)資料
| 型號(hào)： | TSC2302IRGZRG4 |
| 廠(chǎng)商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | GREEN, PLASTIC, VQFN-48 |
| 文件頁(yè)數(shù)： | 20/85頁(yè) |
| 文件大小： | 1483K |
| 代理商： | TSC2302IRGZRG4 |
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TSC2302
SLAS394 – JULY 2003
DAC Control Register (Page 1, Address 02H)
The single bit in this register controls the power down control of the onboard digital-to-analog converter (DAC).
This register is formatted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
DPD
X
Bit 15 — DPD
DAC Power Down. This bit controls whether the DAC is powered up and operational, or powered down. If the
DAC is powered down, the AOUT pin neither sinks nor sources current.
Table 11. DPD Bit Operation
DPD
VALUE
DESCRIPTION
0
DAC is powered and operational
1
DAC is powered down. (default)
Reference Register (Page 1, Address 03H)
This register controls whether the TSC2302 uses an internal or external reference, and if the internal reference is
used, the value of the reference voltage, whether it powers down between conversions and the programmable
settling time after reference power-up. This register is formatted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0 LSB
MSB
11
X
INT
DL1
DL0
PDN
RFV
Bit 4 —INT
Internal Reference Mode. If this bit is written to a 1, the TSC2302 uses its internal reference; if this bit is a 0, the
part assumes an external reference is being supplied. The default state for this bit is to select an external
reference (0). This bit is the same whether reading or writing.
Table 12. INT Bit Operation
INT
VALUE
DESCRIPTION
0
External reference selected (default)
1
Internal reference selected
27
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