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參數(shù)資料
| 型號(hào)： | TSL3301CL |
| 廠商： | AMS-TAOS USA Inc |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 659K |
| 描述： | IC LINEAR SENSOR ARRAY 8CHIPLED |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| 其它名稱： | TSL3301-CLDKR |
TSL3301CL
102 ?1 LINEAR OPTICAL SENSOR ARRAY
WITH ANALOG-TO-DIGITAL CONVERTER
TAOS141 JULY 2011
7
The LUMENOLOGY r Company
r
r
Copyright E 2011, TAOS Inc.
www.taosinc.com
ABORTPixel Abort Pixel Data Read
Encoding: 0x19: <0001_1001>
ABORTPixel is an optional command that stops a READPixel command during its execution. It also causes pixel
integration to terminate and the device to enter the auto-zero/reset state. Any values that were being held in
the arrays sample/hold circuits are lost.
READHold Sample and Read Combination
Encoding: 0x12: <0001_0010>
READHold is a macro command that combines both the SAMPLEInt and READPixel commands into a single
command.
READHoldNStart Combination
Encoding: 0x16: <0001_0110>
READHold is a macro command that combines the SAMPLEInt, READPixel, and StartInt commands into a
single command. 22 clock cycles are necessary to complete the pixel reset cycle.
Register Commands
The register commands provide the user the capability of setting gain and offset corrections for each of the three
zones of pixels. a4a0 refer to the register address as given in Table 2.
REGWrite Write a Gain/Offset/Mode Register
Encoding (2 bytes): 0x40 : <010a4_a3a2a1a0>
REGWrite writes a value into either a gain, offset, or mode register. The 5-bit address of the register is encoded
into the lower 5 bits of the command byte (the first byte). A second byte, which contains the data to be written,
follows the command byte.
REGRead Read a Gain/Offset/Mode Register
Encoding: 0x60: <011a4_a3a2a1a0>
REGRead reads the value previously stored in a gain, offset, or mode register. The 5-bit address of the register
is encoded into the lower 5 bits of the command byte. Following receipt of the REGRead command, the device
places the contents of the selected register onto the SDOUT pin, LSB first.
There is a 4-clock cycle delay from the completion of the REGRead command until the register contents are
output.
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