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參數資料
| 型號： | U62H824PC35 |
| 英文描述： | Low power JFET quad operational amplifier |
| 中文描述： | x24的SRAM |
| 文件頁數： | 4/10頁 |
| 文件大小： | 87K |
| 代理商： | U62H824PC35 |
U62H824
November 01, 2001
4
Switching Characteristics
Read Cycle
Symbol
35
Unit
Alt.
IEC
Min.
Max.
Read Cycle Time
t
RC
t
cR
35
ns
Address Access Time to Data Valid
t
AA
t
a(A)
35
ns
MUX Control to Data Valid
t
a(VS)
35
Chip Enable Access Time to Data Valid
t
ACE
t
a(E)
35
ns
G LOW to Data Valid
t
OE
t
a(G)
15
ns
Output Hold Time from Address Change
t
OH
t
v(A)
5
ns
Output Hold Time from MUX Control Change
t
v(VS)
5
ns
E1 LOW or E2 HIGH to Output in Low-Z
t
LZCE
t
en(E)
0
ns
G LOW to Output in Low-Z
t
LZOE
t
en(G)
0
ns
E1 HIGH or E2 LOW to Output in High-Z
t
HZCE
t
dis(E)
15
ns
G HIGH to Output in High-Z
t
HZOE
t
dis(G)
15
ns
Switching Characteristics
Write Cycle
Symbol
35
Unit
Alt.
IEC
Min.
Max.
Write Cycle Time
t
WC
t
cW
35
ns
Write Pulse Width
t
WP
t
w(W)
20
ns
Write Pulse Width Setup Time
t
WP
t
su(W)
20
ns
Address Setup Time
t
AS
t
su(A)
0
ns
MUX Control Setup Time
t
su(VS)
0
ns
Address Valid to End of Write
t
AW
t
su(A-WH)
30
ns
MUX Control Valid to End of Write
t
su(VS-WH)
30
ns
Adress Valid to End of Write
t
su(A-E)
30
ns
MUX Control Valid to End of Write
t
su(VS-E)
30
ns
Chip Enable Setup Time
t
CW
t
su(E)
20
ns
Pulse Width Chip Enable
t
CW
t
w(E)
20
ns
Data Setup Time
t
DS
t
su(D)
15
ns
Data Hold Time
t
DH
t
h(D)
0
ns
Address Hold from End of Write
t
AH
t
h(A)
0
ns
MUX Control from End of Write
t
h(VS)
0
ns
W HIGH to Output in Low-Z
t
LZWE
t
en(W)
5
ns
W LOW to Output in High-Z
t
HZWE
t
dis(W)
15
ns
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相關代理商/技術參數 |
參數描述 |
|---|---|
| U62H824PK35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x24 SRAM |
| U630 | 制造商:APEM 功能描述: |
| U630H16 | 制造商:SIMTEK 制造商全稱:Simtek Corporation 功能描述:HardStore 2K x 8 nvSRAM |
| U630H16BD1K25 | 制造商:Cypress Semiconductor 功能描述: |
| U630H16BSK25G1 | 制造商:Cypress Semiconductor 功能描述: |
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