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參數資料
| 型號： | UCB1200BE |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 調制器/解調器 |
| 英文描述： | Advanced modem/audio analog front-end |
| 中文描述： | MODEM-SUPPORT CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-313-2, LQFP-48 |
| 文件頁數： | 21/54頁 |
| 文件大小： | 1052K |
| 代理商： | UCB1200BE |
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1998 Jul 22
21
Philips Semiconductors
Product specification
Advanced modem/audio analog front-end
UCB1200
The second ADC start mode gives the opportunity to start the ADC at the rising edge of the signal connected to the
ADCSYNC pin. The 0->1 transition of the ADC_START bit will arm the ADC, such that it will start in the first detected
rising edgeof theADCSYNC signal.Alsoin thismode, theinternal start/stoplogic willdetect whethertheADCmultiplexer
settings are changed simultaneously with the ADC start bit and it will add a delay to ensure sufficient setting time for the
internal track and hold circuit. A rising edge of the signal connected to the ADCSYNC pin occurring during this tracking
time is ignored; the ADC conversion is started on the first rising edge detected after this delay time. This leads to the
following two timing diagrams of the ADC conversion.
Fig.16 ADC timing sequence, ADC sync mode, no changing ADC input multiplexer settings.
‘SIB frame’
adc_ena (internal)
adc_start (internal)
adc_input_selection
‘adc start state’
‘adc state’
adc_sync
adc_dat_valid
adc_data
set adc_ena:1
set adc_start:1
set adc_start:0
read reg:11
wait for start
wait for sync
wait for start
tracking
conversion
tracking
tsibwrite
tsibwrite
tsibwrite
tadcena
thadcsync
tadcsam3
tadcconv
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相關代理商/技術參數 |
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