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參數資料
| 型號： | UCB1400BE |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Audio codec with touch screen controller and power management monitor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 X 1.40 MM, PLASTIC, LQFP-48 |
| 文件頁數： | 6/63頁 |
| 文件大?。?/td> | 674K |
| 代理商： | UCB1400BE |
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Philips Semiconductors
UCB1400
Audio codec with touch screen controller
and power management monitor
Product data
Rev. 02 — 21 June 2002
6 of 63
9397 750 09611
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
8.
AC ’97 interface
The UCB1400 implements an AC ’97 Revision 2.1 interface. Refer to the Audio
Codec ’97 Component Specification Revision 2.1from Intel.
8.1 Clocking
The UCB1400 functions only as a primary codec. As such, it derives its clock
internally from an externally attached 24.576 MHz crystal or clock oscillator, and
drives a buffered and divided down (
1
2
) clock to its digital companion controller over
AC-link under the signal name “BIT_CLK”.
The beginning of all audio sample packets, or Audio Frames, transferred over AC-link
is synchronized to the rising edge of the SYNC signal. SYNC is driven by the AC ’97
Controller. The AC ’97 Controller takes BIT_CLK as an input and generates SYNC by
dividing BIT_CLK by 256 and applying some conditioning to tailor its duty cycle. This
yields a 48 kHz SYNC signal whose period defines an audio frame. Data is
transitioned on AC-link on every rising edge of BIT_CLK, and subsequently sampled
on the receiving side of AC-link on each immediately following falling edge of
BIT_CLK.
8.2 Resetting UCB1400
The UCB1400 recognizes the following types of reset:
Cold reset: where all UCB1400 logic (registers included) is initialized to its default
state. Initiated by bringing RESET LOW for at least 1
μ
s.
Warm reset: where the contents of the UCB1400 register set are left unaltered.
Initiated by bringing SYNC HIGH for at least 1
μ
s without BIT_CLK.
Register reset: which only initializes the UCB1400 registers to their default states.
Initiated by a write to register 0x00.
After signaling a reset to UCB1400, the AC ’97 Controller should not attempt to play
or capture audio data until it has sampled a “Codec Ready” indication from UCB1400.
Fig 4.
UCB1400 and AC ’97 controller connection diagram.
SN00237
UCB1400
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET
IRQOUT
AC97
CONTROLLER
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相關代理商/技術參數 |
參數描述 |
|---|---|
| UCB1400BE,128 | 功能描述:接口—CODEC AUDIO CODEC WITH TOUCHSCREEN RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BE,151 | 功能描述:接口—CODEC AUDIO CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BE,157 | 功能描述:接口—CODEC DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BEFE | 功能描述:IC AUDIO CODEC W/TCH SCRN 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數據接口:串行 分辨率（位）:18 b ADC / DAC 數量:2 / 2 三角積分調變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| UCB1400BE-S | 功能描述:接口—CODEC AUDIO CODEC NO NEW DESIGNS RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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