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參數資料
| 型號： | UDA1309H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Low-power stereo bitstream ADC/DAC(低功耗立體聲位流ADC/DAC) |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數： | 14/24頁 |
| 文件大小： | 150K |
| 代理商： | UDA1309H |
1998 Jan 06
14
Philips Semiconductors
Product specification
Low-power stereo bitstream ADC/DAC
UDA1309H
Analog-to-digital decimation filter
f
s(o)
f
s(i)
f
sys
B
A
sup
output sample frequency
input sample frequency
system clock frequency
signal bandwidth
aliasing suppression
28
256f
s
0.02
60
44.1
128f
s
54
256f
s
20
kHz
f
s(o)
= 44.1 kHz
f
s(o)
B < f
i
< 2f
s(o)
B;
note 6
f
i
> 2f
s(o)
B; note 6
f
i
= 20 Hz to 20 kHz
note 7
kHz
dB
80
0.2
0
+0.2
dB
dB
dB
α
OL
det
frequency response
overload detection level
Digital-to-analog interpolation filter
f
s(o)
f
s(i)
f
sys
B
α
SUP
output sample frequency
input sample frequency
system clock frequency
signal bandwidth
frequency response
out-of-band suppression
28
256f
s
0.02
0.2
40
64f
s
44.1
50
54
256f
s
20
+0.2
kHz
f
s(i)
= 44.1 kHz
f
i
= 20 Hz to 20 kHz
kHz
dB
dB
Digital part;
note 8
I
NPUTS
(
PINS
1
TO
4, 6, 29
TO
32, 35
TO
38, 40
AND
42
TO
44)
V
IL
I
IL
I
IH
C
I(max)
LOW level input voltage
LOW level input current
HIGH level input current
maximum input
capacitance
0.5
0.3V
DDD
10
10
10
V
μ
A
μ
A
pF
V
I
= V
SSD
V
I
= V
DDD
I
NPUT
(
PINS
1
TO
4, 6, 29
TO
32, 35
TO
38, 40
AND
42
TO
44)
V
IH
O
UTPUTS
(
PINS
5
AND
41)
HIGH level input voltage
0.7V
DDD
V
DDD
+ 0.5
V
V
OL
V
OH
I
OZ
LOW level output voltage
HIGH level output voltage
3-state leakage current
I
OL
= 2 mA
I
OH
=
2 mA
V
O
= V
DDD
or V
SSD
V
DDD
0.5
0.5
10
V
V
μ
A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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