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參數資料
| 型號： | UDA1324TS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DAC |
| 英文描述： | Ultra low-voltage stereo filter DAC |
| 中文描述： | SERIAL INPUT LOADING, 20-BIT DAC, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, MO-152, SOT-369-1, SSOP-16 |
| 文件頁數： | 3/20頁 |
| 文件大小： | 107K |
| 代理商： | UDA1324TS |
2000 Jan 20
3
Philips Semiconductors
Preliminary specification
Ultra low-voltage stereo filter DAC
UDA1324TS
QUICK REFERENCE DATA
Notes
1.
2.
The analog performance figures are measured at 2.0 V supply voltage.
The DAC output voltage scales linearly with the power supply voltage.
BLOCK DIAGRAM
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
DDA
V
DDD
I
DDA
I
DDD
DAC;
note 1
analog supply voltage
digital supply voltage
analog supply current
digital supply current
1.9
1.9
2.0
2.0
3.0
1.5
2.7
2.7
V
V
mA
mA
V
DDA
= 2.0 V
V
DDD
= 2.0 V
V
o(rms)
(THD + N)/S
output voltage (RMS value)
total harmonic distortion-plus-noise to
signal ratio
note 2
at 0 dB
at
60 dB; A-weighted
code = 0; A-weighted
40
500
83
36
97
100
78
+70
mV
dB
dB
dB
dB
°
C
S/N
α
cs
T
amb
signal-to-noise ratio
channel separation
ambient temperature
Fig.1 Block diagram.
handbook, full pagewidth
MBK770
DAC
UDA1324TS
NOISE SHAPER
INTERPOLATION FILTER
VOLUME/MUTE/DE-EMPHASIS
CONTROL
INTERFACE
14
15
DAC
6
DIGITAL INTERFACE
8
16
9
10
3
2
1
4
5
11
7
13
12
VOUTR
BCK
WS
DATAI
VSSA
VOUTL
VDDA
VDDD
Vref(DAC)
VSSD
APPL0
APPL1
APPL2
APPL3
SYSCLK
APPSEL
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