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參數資料
型號: UDA1350ATS
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: IEC 958 audio DAC
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO28
封裝: PLASTIC, SSOP-28
文件頁數: 19/32頁
文件大小: 124K
代理商: UDA1350ATS
2000 Mar 29
19
Philips Semiconductors
Preliminary specification
IEC 958 audio DAC
UDA1350ATS
8.6.9
R
EADABLE REGISTERS
8.6.9.1
Mute status
A 1-bit value indicating whether the interpolator is muting
or not muting.
Table 19
Interpolator mute status
8.6.9.2
PLL lock detection
A 1-bit value indicating that the clock regeneration is
locked.
Table 20
PLL lock indication
8.6.9.3
SPDIF lock detection
A 1-bit value indicating the IEC 958 decoder is locked and
is decoding correct data.
Table 21
SPDIF lock detection
8.6.9.4
Audio sample frequency detection
A 2-bit value indicating the audio sample frequency of the
IEC 958 input signal.
Table 22
Audio sample frequency detection
8.6.9.5
PCM detection
A 1-bit value which indicates whether the IEC 958 input
contains PCM audio data or other binary data.
Table 23
Two channel PCM input detection
8.6.9.6
Pre-emphasis detection
A 1-bit value which indicates whether the pre-emphasis bit
was set on the IEC 958 input signal or not set.
Table 24
Pre-emphasis detection
8.6.9.7
Clock accuracy detection
A 2-bit value indicating the timing accuracy of the IEC 958
input signal is conforming to the IEC 958 specification.
Table 25
Input signal accuracy detection
MT stat
FUNCTION
0
1
no muting
muting
PLL lock
FUNCTION
0
1
out-of-lock
locked
SPD lock
FUNCTION
0
1
not locked
or
non-PCM data detected
locked
and
PCM data detected
ASF1
ASF0
FUNCTION
0
0
1
1
0
1
0
1
44.1 kHz
undefined
48.0 kHz
32.0 kHz
PCM stat
FUNCTION
0
1
input with two channel PCM data
input without two channel PCM data
PRE
FUNCTION
0
1
no pre-emphasis
pre-emphasis
ACC1
ACC0
FUNCTION
0
0
1
1
0
1
0
1
level II
level I
level III
undefined
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相關代理商/技術參數
參數描述
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