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參數資料
| 型號： | W24LH8S-55LI |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | Normal speed, Very low power CMOS static RAM Organized as 32768 x 8 bits |
| 中文描述： | 32K X 8 STANDARD SRAM, 100 ns, PDSO28 |
| 封裝： | 0.330 INCH, SOP-28 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 198K |
| 代理商： | W24LH8S-55LI |
W24LH8
32K
′
8 CMOS STATIC RAM
Publication Release Date: March 2001
- 1 -
Revision A3
GENERAL DESCRIPTION
The W24LH8 is a normal speed, very low power CMOS static RAM organized as 32768
×
8 bits that
operates on a wide voltage range from 2.7V to 5.5V power supply. The W24LH8 family, W24LH8-55LE
and W24LH8-55LI, can meet requirement of various operating temperature. This device is
manufactured using Winbond's high performance CMOS technology.
FEATURES
Low power consumption
Access time: 55 nS (5V
±
10%),
100 nS (3V
±
10%)
2.7V to 5.5V supply voltage
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Available packages: 330 mil SOP and standard
type one TSOP (8 mm
×
13.4 mm)
PIN CONFIGURATIONS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
#WE
A13
A8
A9
A11
#OE
A10
#CS
I/O8
I/O7
I/O6
I/O5
I/O4
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28-pin
#OE
A11
A9
#V
A14
A7
A6
A4
A10
#CS
I/O8
I/O7
I/O6
I/O4
V
I/O3
A2
BLOCK DIAGRAM
CLK GEN.
PRECHARGE CKT.
CORE CELL ARRAY
512 ROWS
64 X 8 COLUMNS
DATA
CLK
R
O
W
D
E
C
O
D
E
R
A12
A14
A2
A3
A4
A5
A6
A7
A13
A11
I/O CKT.
COLUMN DECODER
#OE
#WE
#CS
I/O1
I/O8
A10 A1 A0 A8 A9
PIN DESCRIPTION
SYMBOL
A0
A14
I/O1
I/O8
#CS
#WE
#OE
V
DD
V
SS
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
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