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參數(shù)資料
| 型號(hào)： | W25P243AF-6 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | DIODE ZENER QUAD COMMON-ANODE 200mW 20Vz 5mA-Izt 0.05 0.1uA-Ir 14 SOT-363 3K/REEL |
| 中文描述： | 64K X 64 STANDARD SRAM, 6 ns, PQFP128 |
| 封裝： | QFP-128 |
| 文件頁(yè)數(shù)： | 1/18頁(yè) |
| 文件大小： | 264K |
| 代理商： | W25P243AF-6 |
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W25P243A
64K
×
64 BURST PIPELINED HIGH-SPEED
CMOS STATIC RAM
Publication Release Date: August 1999
- 1 -
Revision A3
GENERAL DESCRIPTION
The W25P243A is a high-speed, low-power, synchronous-burst pipelined, CMOS static RAM
organized as 65,536
×
64 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst
address counter supports both Pentium
burst mode and linear burst mode. The mode to be
executed is controlled by the LBO pin. Pipelining or non-pipelining of the data outputs is controlled by
the FT pin. A snooze mode can reduce power dissipation.
W25P243A supports 2T/1T mode, while disable data output within one cycle in a burst read when the
device is deselected by CE2/CE3 .
This device supports 3-1-1-1-2-1-1-1 in a two-bank, back-to-back burst read cycle.
FEATURES
Synchronous operation
High-speed access time: 4.5/5/6 nS (max.)
Single +3.3V power supply
Individual byte write capability
3.3V LVTTL compatible I/O
Clock-controlled and registered input
Asynchronous output enable
Pipelined data output capability
Supports snooze mode (low-power state)
Internal burst counter supports Intel burst
(Interleaved) mode & linear burst mode
Support 2T/1T mode
Packaged in 128-pin QFP and TQFP
BLOCK DIAGRAM
A(15:0)
DATA I/O
REGISTER
INPUT
REGISTER
CONTROL
LOGIC
REGISTER
64K X 64
CORE
ARRAY
CE(3:1)
BWE
CLK
OE
GW
ADSC
ADSP
ADV
LBO
BW(8:1)
I/O(64:1)
ZZ
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25S243A | 64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25S243AD-12 | RECTIFIER FAST-RECOVERY SINGLE 1.5A 100V 50A-ifsm 1.2V-vf 150ns 5uA-ir DO-41 1K/BULK |
| W25S243AF-12 | DIODE SCHOTTKY QUAD SERIES (RAIL CLAMP) 25V 200mW 0.35V-vf 200mA-IFM 1mA-IF 2uA-IR SOT-363 3K/REEL |
| W25S243A-12 | 64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25Z040A | 128K×36bit Pipeline ZWS(Zero-Wait-State) SRAM(128K×36位無(wú)等待時(shí)間的管線CMOS同步靜態(tài)RAM) |
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參數(shù)描述 |
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