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參數資料
| 型號： | W83194BR-39B |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | XO, clock |
| 英文描述： | STEP-LESS 3-DIMM CLOCK |
| 中文描述： | 155 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數： | 1/20頁 |
| 文件大小： | 276K |
| 代理商： | W83194BR-39B |
W83194BR-39B
STEP-LESS 3-DIMM CLOCK
Publication Release Date: June 2000
- 1 - Revision 0.46
1.0 GENERAL DESCRIPTION
The W83194BR-39B is a Clock Synthesizer which provides all clocks required for high-speed RISC or
CISC microprocessor such as Intel Pentium II or Pentium III. W83194BR-39B provides 64 CPU/PCI
frequencies which are selectable with smooth transitions by hardware or software. W83194BR-39B
also provides 13 SDRAM clocks controlled by the none-delay buffer_in pin.
The W83194BR-39B provides step-less frequency programming by controlling the VCO freq. and the
programmable PCI clock output divisor ratio. A watch dog timer is quipped and when time out, the
RESET# pin will output 4ms pulse signal.
The W83194BR-39B accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at
±0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency
selection through I
2
C interface. The device meets the Pentium power-up stabilization, which requires
CPU and PCI clocks be stable within 2 ms after power-up. Using dual function pin for the slots(ISA,
PCI, CPU, DIMM) is not recommend.
2.0 PRODUCT FEATURES
Supports Pentium
II and !!! CPU with I
2
C.
2 CPU clocks (one free-running CPU clock)
13 SDRAM clocks for 3 DIMMs
6 PCI synchronous clocks
One IOAPIC clock for multiprocessor support
Optional single or mixed supply:
(Vddq1=Vddq2 = Vddq3 = Vddq4 = VddL1 =VddL2= 3.3V) or (Vddq1= Vddq2 = Vddq3=Vddq4 =
3.3V, VddL1 = VddL2 = 2.5V)
< 250ps skew among CPU and SDRAM clocks
< 250ps skew among PCI clocks
< 5ns propagation delay SDRAM from buffer input
Skew from CPU (earlier) to PCI clock 1 to 4ns, center 2.6ns.
Smooth frequency switch with selections from 66 MHz to 200 MHz CPU
Step-less frequency programming by controlling the VCO freq. and the clock output divisor ratio
I
2
C 2-Wire serial interface and I
2
C read back
±0.25% or ±0.5% spread spectrum function to reduce EMI in freq. table mode
Programmable spread spectrum in the M/N step-less mode
Programmable registers to enable/stop each output and select modes
MODE pin for power Management
RESET# out when watch dog timer time out
One 48 MHz for USB & one 24 MHz for super I/O
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| W83194R-67A | 100MHZ 3-DIMM CLOCK FOR VIA MVP4 |
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相關代理商/技術參數 |
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| W83194BR-603 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:Winbond Clock Generator For INTEL P4 Springdale Series Chipset |
| W83194BR-63S | 制造商:WINBOND 制造商全稱:Winbond 功能描述:STEP-LESS CLOCK FOR SIS CHIPSET |
| W83194BR-640 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:166MHZ CLOCK FOR SIS CHIPSET |
| W83194BR-645 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:CLOCK GENERATOR FOR SIS 645/650 CHIPSET |
| W83194BR-648 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:CLOCK GENERATOR FOR SIS P4 SERIES CHIPSET |
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