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參數資料
| 型號： | 48SD3208RPFK |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | DRAM |
| 英文描述： | CAP 1.5UF 50V CERAMIC MONO 20% |
| 中文描述： | 32M X 8 SYNCHRONOUS DRAM, 6 ns, PDFP72 |
| 封裝： | DFP-72 |
| 文件頁數： | 2/39頁 |
| 文件大小： | 589K |
| 代理商： | 48SD3208RPFK |
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48SD3208
M
em
o
ry
10
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
256Mb (8-Meg X 8-Bit X 4-Banks) SDRAM
01.10.05 Rev 2
DQM Truth Table
Note: H: V
IH L: VIL x VIH or VIL
Write: I
DID is Needed
Read: I
DOD is Needed
The SDRAM can mask input/output data by means of DQM.
During reading, the output buffer is set to Low-Z by setting DQM to Low, enabling data output. On the other
hand, when DQM is set High, the output buffer becomes High-Z, disabling data output.
During writing, data is written by setting DQM to Low. When DQM is set to High, the previous data is held
( the new data is not written). Desired data can be masked during burst read or burst write by setting DQM..
For more details, refer to the DQM control section of the SDRAM operating instructions.
CKE Truth Table
Note: H:V
IH L:VIL x VIH or VIL
Clock suspend mode entry: The SDRAM enters clock suspend mode from active mode by setting CKE to
Low. If a command is input in the clock suspend mode entry cycle, the command is valid. The clock suspend
mode change depending on the current status (1 clock before) as described below.
COMMAND
SYMBOL
CKE= N-1
CKE = N
DQM
Byte (DQ0 to DQ7) write enable/output enable
ENBL
H
x
L
Byte (DQ0 to DQ7) write inhibit/output disable
MASK
H
x
H
CURRENT STATE
COMMAND
N
-1
N
CS
RAS
CAS
WE
ADDRESS
Active
Clock suspended mode entry
H
L
x
Any
Clock Suspend
L
x
Clock Suspend
Clock Suspend mode exit
L
H
x
Idle
Auto-refresh command (REF)
H
L
H
x
Idle
Self-refresh entry (SELF)
H
L
H
x
Idle
Power down entry
HL
LH
H
x
H
L
HL
xxx
x
Self Refresh
Self Refresh exit (SELFX)
L
H
L
H
x
Power down
Power down exit
LH
H
x
L
H
xxx
x
相關PDF資料 |
PDF描述 |
|---|---|
| 48SD3208RPFE | 256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks |
| 48SD3208RPFH | 256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks |
| 48SD3208RPFI | CAP 1.5UF 50V CERAMIC MONO 20% |
| 48SD3208 | 256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks |
| 48SD6404RPFE | CAP 1200PF 100V CERAMIC MONO 5% |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 48SD6404 | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks |
| 48SD6404RPFE | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks |
| 48SD6404RPFH | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks |
| 48SD6404RPFI | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks |
| 48SD6404RPFK | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks |
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