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參數資料
| 型號： | 9161A-01CW16T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 120 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數： | 5/15頁 |
| 文件大小： | 544K |
| 代理商： | 9161A-01CW16T |
13
ICS9161A
0210I—03/21/05
General Layout Precautions:
1) Use a ground plane on the top layer
of the PCB in all areas not used by
traces.
2) Make all power traces and vias as
wide as possible to lower inductance.
Notes:
1) All clock outputs should have series
terminating resistor. Not shown in
all places to improve readibility of
diagram.
2) 47 ohm / 56pf RC termination
should be used on all over 50MHz
outputs.
3) Optional crystal load capacitors are
recommended.
Capacitor Values:
C1, C2 : Crystal load values determined by user
C3 : 100pF ceramic
All unmarked capacitors are 0.01F ceramic
Connections to VDD:
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