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參數資料
| 型號： | 935269576557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, HEAT SINK, PLASTIC, SOT-638-1, TQFP-100 |
| 文件頁數： | 33/84頁 |
| 文件大小： | 1054K |
| 代理商： | 935269576557 |
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Philips Semiconductors
PNX8510/11
Analog Companion Chip
9397 750 08865
Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
Product data
Rev. 02 — 8 October 2001
39 of 84
Offset 0x63—0x66
FSC0-FSC3
7:0
R/W
0x2A09
8ACB
0x63=FSC0
0x64=FSC1
0x65=FSC2
0x66=FSC3
ffsc: subcarrier frequency (in multiples of line frequency)
fllc: clock frequency (in multiples of line frequency)
FSC = round ((ffsc/fllc)x2^32)
FSC3 most significant byte
FSC0 least significant byte
NTSC-M: ffsc 227.5, fllc 1716 -> FSC = 21F07C1F
PAL-B/G: ffsc 283.7516, fllc 1728 -> FSC = 2A098ACB
SECAM: ffsc 274.304, fllc 1728 -> FSC = 28A33BB2
Offset 0x67
L21O0
7:0
R/W
0x0
L21O0
First byte of closed captioning data, odd field
Offset 0x68
L21O1
7:0
R/W
0x0
L21O1
Second byte of closed captioning data, odd field
Offset 0x69
L21E0
7:0
R/W
0x0
L21E0
First byte of closed captioning data, even field
Offset 0x6A
L21E1
7:0
R/W
0x0
L21E1
Second byte of closed captioning data, even field
Offset 0x6B
must be initialized to zero.
Offset 0x6C
TRGCTL1 - Not present in secondary video channel.
7:0
R/W
0x01
HTRIG
Sets horizontal trigger phase related to encoder input.
Values above 1715 (FISE=1) or 1727 (FISE=0) are not allowed.
Increasing HTRIG decreases delay as of all internally generated
timing signals
Reference mark: analog output horizontal sync (leading slope)
coincides with active edge of RCV used for triggering at
HTRIG=0x398.
Offset 0x6D
TRGCTL2 - Not present in secondary video channel.
7:5
R/W
0x1
HTRIG
Sets horizontal trigger phase related to encoder input.
4:0
R/W
0x0
VTRIG
Increasing VTRIG decreases delays of all internally generated
timing signals measured in half lines.
Variation range of VTRIG = 0 to 0x1F
Offset 0x6E
MULTICTL
7-
Unused
6
R/W
0
BLCKON
0 = Encoder in normal operation mode
1 = Output signal is forced to blanking level.
5:4
R/W
0x2
PHRES
Selects the phase reset mode of the color subcarrier.
00 = No phase reset or reset via RTC
01 = Phase reset every two lines
10 = Reset every eight fields
11 = Reset every four fields
3:2
R/W
0x0
LDEL
Selects the luminance delay in reference to the chrominance
00 = No luma delay
01 = 1LLC luma delay
10 = 2LLC luma delay
11 = 3LLC luma delay
1:0
R/W
0x0
FLC
Field length control
00 = Interlaced 312.5 lines/field at 50Hz, 262.5 lines/field at
60Hz
01 = Non interlaced 312 lines @50Hz, 262 lines @60Hz
10 = Non interlaced 313 lines @50Hz, 263 lines @60Hz
11 = Non interlaced 313 lines @50Hz, 263 lines @60Hz
Bits
Read/
Write
Reset
Value
Name
(Field or Function)
Description
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