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參數資料
| 型號： | 935269576557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, HEAT SINK, PLASTIC, SOT-638-1, TQFP-100 |
| 文件頁數： | 7/84頁 |
| 文件大小： | 1054K |
| 代理商： | 935269576557 |
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Philips Semiconductors
PNX8510/11
Analog Companion Chip
9397 750 08865
Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
Product data
Rev. 02 — 8 October 2001
15 of 84
2.6.4 Macrovision
PNX8510
The encoder supports Macrovision
Anti-Taping for both NTSC and PAL. There is no
Macrovision insertion for SECAM defined, however for AGC Pseudo Sync and BP pulses the
same settings used for PAL could be used for SECAM. The different steps of this process can be
programmed separately. The Macrovision control block provides all necessary timing and level
information for inserting the correct pulses in the CVBS/Y/C/RGB/YUV data stream.
Furthermore it provides the signals used to modify the subcarrier generator according to the
Macrovision Burst Inversion requirements.
The encoder uses a blanking level during the vertical blanking interval that is defined by the
value of BLNVB, thus providing two different programmable blanking levels. Outside vertical
blanking, value of BLNNL is effective, which should be reduced according to Macrovision
requirements. The copy protection means can be activated independently by the respective
control bits. The copy protection mechanism is optional and will be enabled by bonding a die-
pad to either VDD or VSS.
PNX8511
Macrovision is not available in the PNX8511.
2.7 HD Data Path
The high definition data path of the PNX8510/11 IC features an up-sampling filter, gain control
and a universal sync insertion engine.
Input formats supported by the high definition data path are:
Double D1 mode:16/20 bit 422 (8/10 bit for Y and 8/10 bit for U/V); DEMUX_MODE set to 3’b011
Single interface HD 422 mode (UYVY 422 D1 format); DEMUX_MODE set to 3’b100
Single interface 444 (RGB/YUV 444 format); DEMUX_MODE set to 3’b001
Full 24/30 bit parallel input mode (YUV/RGB 444 formats); VMODE set to zero
RGB and YUV data types are accepted. However, there is no color space conversion in the HD
data path so the input data type has to match the display data type.
The up-sampling filter can be applied to convert incoming 422 data formats to 444.
The data path also provides individual gain control for RGB/YUV which allows a +/- 0.5x
amplitude change (HD_GAIN_R/Y, HD_GAIN_U/G, HD_GAIN_V/B control registers).
The HD sync insertion module following the filter and gain control circuits provides flexible
insertion of synchronization signals into the Y, Y and V or R, G and B data paths. The insertion
can be chosen on a component basis (Y/R_SYNC_INS_EN, U/G_SYNC_INS_EN, V/
B_SYNC_INS_EN control registers) and the sync generator provides individual tables for the
components. A more detailed description of the sync generator can be found in the next
paragraph.
2.8 HD-Sync Generator Module
This section describes the operation and programming of the high definition (HD) video data
path sync unit.
The module’s purpose is to provide the video data path that bypasses the digital video encoders
with the appropriate synchronization pattern. The module design provides maximum flexibility in
terms of raster generation for all interlaced and non-interlaced ATSC formats. The sync engine is
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